公开(公告)号：US07240302B1

公开(公告)日：2007-07-03

申请号：US11021841

申请日：2004-12-23

申请人： Albert Chang

发明人： Albert Chang

IPC分类号： G06F17/50

CPC分类号： G06F17/5072

摘要： A method for modifying a compiled integrated circuit floorplan is provided. A non-optimally placed functional element within the floorplan is identified and then moved to a tray region outside of the integrated circuit floorplan. A location to move the non-optimally placed functional element is identified. In one embodiment, the location to move the non-optimally placed functional element is not viewable in the same display as the original location of the non-optimally placed functional element. The non-optimally placed functional element is then relocated from the tray region to a new location within the floorplan. The modified floorplan may be recompiled upon relocation of the functional element. A computer readable medium, a graphical user interface, and a system for designing an integrated circuit are also provided.

摘要翻译： 提供了一种用于修改编译的集成电路平面图的方法。 识别出在平面布置图内的非最佳放置的功能元件，然后移动到集成电路平面图外部的托盘区域。 识别移动非最佳放置功能元件的位置。 在一个实施例中，移动非最佳放置的功能元件的位置在与非最佳放置的功能元件的原始位置相同的显示中是不可见的。 然后将非最佳放置的功能元件从托盘区域重新定位到平面图中的新位置。 修改后的平面图可以在功能元件重新定位时重新编译。 还提供了计算机可读介质，图形用户界面和用于设计集成电路的系统。

公开(公告)号：US20060170317A1

公开(公告)日：2006-08-03

申请号：US11050528

申请日：2005-02-03

申请人： Yung-Lin Lin ,  Albert Chang

发明人： Yung-Lin Lin ,  Albert Chang

IPC分类号： H01J61/94

CPC分类号： H04N5/08 ,  H05B41/2824 ,  H05B41/3921

摘要： A method according to one embodiment may include providing power to at least one light source. The method of this embodiment may also include detecting the frequency of at least one vertical synchronization signal, among a plurality of different synchronization signals, and controlling the power to at least one light source based on, at least in part, the detected frequency of at least one vertical synchronization signal. Of course, many alternatives, variations, and modifications are possible without departing from this embodiment.

公开(公告)号：US06961813B2

公开(公告)日：2005-11-01

申请号：US10373969

申请日：2003-02-25

申请人： Thomas Grieff ,  James R. Reif ,  Albert Chang

发明人： Thomas Grieff ,  James R. Reif ,  Albert Chang

IPC分类号： G06F3/06 ,  G06F11/00 ,  G06F12/00 ,  G06F13/00

CPC分类号： G06F3/0607 ,  G06F3/0659 ,  G06F3/0674

摘要： A multi-port adapter and method of operation suitable for use with serial ATA devices is disclosed. An adapter includes a switch that receives input from multiple host devices and an arbiter module for assigning a priority scheme to received commands. An outstanding request table is implemented as a memory module for storing identifying information associated with commands received from multiple host devices, and a free pointers queue is maintained to track slots available in the outstanding request table. A command tracker state machine decodes incoming requests from hosts, monitors the execution by these commands by the ATA device, and updates the memory module to reflect completion of commands. Also disclosed is a storage system including an adapter of the present invention and ATA storage devices.

公开(公告)号：US06338128B1

公开(公告)日：2002-01-08

申请号：US09315543

申请日：1999-05-20

申请人： Albert Chang ,  Edward John Silha ,  Larry Edward Thatcher ,  Gus Wai-Yan Yeung

发明人： Albert Chang ,  Edward John Silha ,  Larry Edward Thatcher ,  Gus Wai-Yan Yeung

IPC分类号： G06F1200

CPC分类号： G06F12/1036 ,  G06F12/1054 ,  G06F12/109

摘要： As a program is replaced by the operating system running within a microprocessor, only those entries associated with the replaced program and resident within effective-to-real address translation units will be replaced. Those entries within the effective-to-real address translation units associated with the operating system and shared libraries, and any other software units operating within the microprocessor will not be invalidated.

摘要翻译： 由于程序被微处理器内运行的操作系统所替代，所以仅替换与替换的程序相关联的入口和驻留在有效到实际地址转换单元内的条目。 与操作系统和共享库相关联的有效到实际地址转换单元以及在微处理器内运行的任何其他软件单元之间的条目将不会被无效。

公开(公告)号：US5760670A

公开(公告)日：1998-06-02

申请号：US792273

申请日：1997-01-31

申请人： Ming Yeh ,  Y. J. Chen ,  H. B. Chan ,  Antony Du ,  Albert Chang

发明人： Ming Yeh ,  Y. J. Chen ,  H. B. Chan ,  Antony Du ,  Albert Chang

IPC分类号： H01F27/24 ,  H01F27/26 ,  H01F21/06 ,  H01F17/06 ,  H01F27/30

CPC分类号： H01F27/24 ,  H01F27/266

摘要： The present invention relates to a tranformer core structure, which includes a rectangular frame core having two long sides and two short sides, with one short side having a recessed part and the other short side being closed to form a junction surface of magnetic path; and a strip core disposed in the rectangular frame core through the recessed part, and having a length similar to that of said long side of said rectangular frame core, but having a width slightly less than that of said recessed part, wherein adjustment of the inductance of the structure is accomplished by moving said strip core along said recessed part to adjust a gap between one end of said strip core and said junction surface of magnetic path.

摘要翻译： 本发明涉及一种变压器芯结构，其包括具有两个长边和两个短边的矩形框架芯，一个短边具有凹部，另一个短边被封闭以形成磁路的接合面; 以及带状芯，其通过所述凹部设置在所述矩形框架芯中，并且具有与所述矩形框架芯的所述长边的长度相似的长度，但是具有略小于所述凹部的宽度的宽度，其中所述电感的调整 通过沿着所述凹部移动所述带芯以调节所述带芯的一端和所述磁路的接合表面之间的间隙来实现所述结构。

公开(公告)号：US08350868B2

公开(公告)日：2013-01-08

申请号：US12898517

申请日：2010-10-05

申请人： Albert Chang ,  Bin Liao ,  Cameron Murray Edwards ,  Scott Bradley

发明人： Albert Chang ,  Bin Liao ,  Cameron Murray Edwards ,  Scott Bradley

IPC分类号： G09G5/02

CPC分类号： G06T11/60

摘要： A method of compositing a plurality of graphic objects with a compositing buffer, is disclosed. The plurality of graphic objects forming a group is attenuated by group opacity and is composited from a top object to a bottom object. Based on a first mask and the group opacity, a second mask is generated. The first mask stores a remaining possible contribution for further graphic objects below and including the plurality of graphic objects. The plurality of graphic objects in a top down order is processed. In particular, for each graphic object of the plurality of graphic objects: (a) a contribution value for the graphic object using the second mask is determined, the contribution value representing a contribution of the graphic object to the compositing buffer; (b) a colour value of the graphic object is composited with the compositing buffer using the contribution value; and (c) the second mask is updated using the contribution value. The first mask is then updated using the second mask and the group opacity. The updated first mask is configured for further compositing of objects below the plurality of graphic objects.

摘要翻译： 公开了一种将多个图形对象与合成缓冲器合成的方法。 形成组的多个图形对象由组不透明度衰减，并从顶部对象到底部对象进行合成。 基于第一个掩码和组不透明度，生成第二个掩码。 第一个掩模存储剩余可能的贡献用于下面并且包括多个图形对象的进一步图形对象。 以自顶向下的顺序处理多个图形对象。 特别地，对于多个图形对象的每个图形对象：（a）确定使用第二掩码的图形对象的贡献值，贡献值表示图形对象对合成缓冲器的贡献; （b）图形对象的颜色值使用贡献值与合成缓冲器合成; 和（c）使用贡献值来更新第二掩模。 然后使用第二个掩码和组不透明度更新第一个掩码。 更新的第一掩模被配置用于进一步合成多个图形对象下方的对象。

公开(公告)号：US20110109642A1

公开(公告)日：2011-05-12

申请号：US12898517

申请日：2010-10-05

申请人： Albert Chang ,  Bin Liao ,  Cameron Murray Edwards ,  Scott Bradley

发明人： Albert Chang ,  Bin Liao ,  Cameron Murray Edwards ,  Scott Bradley

IPC分类号： G09G5/02

CPC分类号： G06T11/60

摘要： A method of compositing a plurality of graphic objects with a compositing buffer, is disclosed. The plurality of graphic objects forming a group is attenuated by group opacity and is composited from a top object to a bottom object. Based on a first mask and the group opacity, a second mask is generated. The first mask stores a remaining possible contribution for further graphic objects below and including the plurality of graphic objects. The plurality of graphic objects in a top down order is processed. In particular, for each graphic object of the plurality of graphic objects: (a) a contribution value for the graphic object using the second mask is determined, the contribution value representing a contribution of the graphic object to the compositing buffer; (b) a colour value of the graphic object is composited with the compositing buffer using the contribution value; and (c) the second mask is updated using the contribution value. The first mask is then updated using the second mask and the group opacity. The updated first mask is configured for further compositing of objects below the plurality of graphic objects.

摘要翻译： 公开了一种将多个图形对象与合成缓冲器合成的方法。 形成组的多个图形对象由组不透明度衰减，并从顶部对象到底部对象进行合成。 基于第一个掩码和组不透明度，生成第二个掩码。 第一个掩模存储剩余可能的贡献用于下面并且包括多个图形对象的进一步图形对象。 以自顶向下的顺序处理多个图形对象。 特别地，对于多个图形对象的每个图形对象：（a）确定使用第二掩码的图形对象的贡献值，贡献值表示图形对象对合成缓冲器的贡献; （b）图形对象的颜色值使用贡献值与合成缓冲器合成; 和（c）使用贡献值来更新第二掩模。 然后使用第二个掩码和组不透明度更新第一个掩码。 更新的第一掩模被配置用于进一步合成多个图形对象下方的对象。

公开(公告)号：US20100074033A1

公开(公告)日：2010-03-25

申请号：US12235467

申请日：2008-09-22

申请人： Feng Pan ,  Yuxin Wang ,  Jonathan H. Huynh ,  Albert Chang ,  Khin Htoo ,  Qui Vi Nguyen

发明人： Feng Pan ,  Yuxin Wang ,  Jonathan H. Huynh ,  Albert Chang ,  Khin Htoo ,  Qui Vi Nguyen

IPC分类号： G11C5/14 ,  G05F1/10

CPC分类号： G11C8/08 ,  G11C5/147 ,  G11C16/30

摘要： A circuit and corresponding method for providing a reference voltage are presented. The circuit includes a current source having a magnitude with positive temperature correlation connected to a node, and a diode element connected between the node and ground, where the reference voltage is provided from the node. The circuit also includes a variable resistance connected to receive an input indicative of the circuit temperature and through which the diode element is connected to the node. The value of the variable resistance is adjusted based upon the circuit temperature input. The circuit is useful for application as a peripheral circuitry, such as on a flash or other non-volatile memory and other circuits requiring an on-chip reference voltage source.

摘要翻译： 提出了一种用于提供参考电压的电路和相应的方法。 电路包括具有连接到节点的正温度相关幅度的电流源和连接在节点和地之间的二极管元件，其中从该节点提供参考电压。 电路还包括可变电阻，其连接以接收指示电路温度的输入，并且二极管元件通过该电阻连接到节点。 可变电阻的值根据电路温度输入进行调整。 该电路可用作外围电路，例如闪存或其他非易失性存储器以及需要片上参考电压源的其他电路。

公开(公告)号：US20100026213A1

公开(公告)日：2010-02-04

申请号：US12574244

申请日：2009-10-06

申请人： Yung-Lin Lin ,  Albert Chang

发明人： Yung-Lin Lin ,  Albert Chang

IPC分类号： H05B37/02

CPC分类号： H04N5/08 ,  H05B41/2824 ,  H05B41/3921

摘要： A method according to one embodiment may include providing power to at least one light source. The method of this embodiment may also include detecting the frequency of at least one vertical synchronization signal, among a plurality of different synchronization signals, and controlling the power to at least one light source based on, at least in part, the detected frequency of at least one vertical synchronization signal. Of course, many alternatives, variations, and modifications are possible without departing from this embodiment.

摘要翻译： 根据一个实施例的方法可以包括向至少一个光源提供功率。 该实施例的方法还可以包括在多个不同的同步信号之中检测至少一个垂直同步信号的频率，并且至少部分地至少基于所检测到的频率，控制至少一个光源的功率 至少一个垂直同步信号。 当然，在不偏离本实施例的情况下，可以进行许多替代，变化和修改。

公开(公告)号：US07454729B1

公开(公告)日：2008-11-18

申请号：US11281178

申请日：2005-11-16

申请人： Fiyaz Kanji ,  Albert Chang

发明人： Fiyaz Kanji ,  Albert Chang

IPC分类号： G06F17/50

CPC分类号： G06F17/5031 ,  G06F2217/84

摘要： A method for validating timing violations in a testbench is provided. The method includes obtaining the timing requirements for a design under test from a first file. The timing requirements for the design may be entered as an input to a verification tool. Then, based on the timing requirements of the user, a place and route operation is performed resulting in a design layout. Following the place and route operation, timing results are obtained for the design layout. The timing results may be obtained through simulation. From the timing results, timing values are extracted at the input level so that the inputs may be driven based on those timing values. The timing values compensate for any timing violations that may have resulted from the timing models of the verification tool.

摘要翻译： 提供了一种用于验证测试台中的定时违规的方法。 该方法包括从第一个文件获得被测设计的时序要求。 设计的时序要求可以作为验证工具的输入输入。 然后，基于用户的定时要求，执行位置和路线操作，导致设计布局。 在位置和路线操作之后，获得设计布局的定时结果。 定时结果可以通过仿真获得。 从定时结果，在输入电平提取定时值，以便可以基于这些定时值来驱动输入。 定时值补偿了验证工具的时序模型可能导致的任何定时违规。