Abstract:
A manufacturing method of a random access memory includes the following steps: providing a semiconductor structure having an array region and a peripheral region; forming a plurality of first trenches in the array region, and concurrently, a plurality of second trenches on the peripheral region; forming a polysilicon layer to cover the array region and the peripheral region, and the first and the second trenches are filled up with the polysilicon layer; planarizing the polysilicon layer so the remaining polysilicon layer only resides in the first and the second trenches; forming a conductive layer on the semiconductor structure; patterning the conductive layer to form a plurality of landing pads on the array region, and a plurality of bit line units on the peripheral region; and forming a plurality of capacitor units which is in electrical connection to the landing pads.
Abstract:
An apparatus for use in the photoresist development process of an integrated circuit fabrication is provided to improve the uniformity of development. The apparatus includes: a holder which includes a vertical spindle and a chuck fixed on the top of the vertical spindle, for horizontally holding a semiconductor wafer; a liquid feeder disposed above the holder, for supplying a developer onto the semiconductor wafer; a cup-type housing disposed under the holder, wherein the bottom of the cup-type housing includes a valve for draining the developer and a hole for allowing the vertical spindle to penetrate through; and a hoisting instrument fixed on the bottom of the cup-type housing, so that when the cup-type housing is lifted, the edge of the semiconductor wafer tightly contacts the sidewall of the cup-type housing, thereby forming a dish-like container for containing the developer.
Abstract:
This computer system, as well as its method of operation, corrects the position data used to define the location of alignment marks on a workpiece. The first step is to scan marks along a first direction to determine the direction of wafer scaling along the first direction. Second, scan marks along a second direction to determine the direction of wafer scaling along the second direction. Next, scan a first set of alignment marks on a workpiece oriented in a first direction and a second set of alignment marks on the workpiece oriented in a second direction in an initial sequence to collect initial direction data on the location. Then, scan the first set of alignment marks and the second set of alignment marks in a reverse sequence to collect reverse direction data on the location. Finally, average the initial direction data and the reverse direction data. This enables correction of false alignment data attributable to falsely measured locations of alignment marks.