公开(公告)号：US06222822B1

公开(公告)日：2001-04-24

申请号：US08831273

申请日：1997-03-31

申请人： Pierre Gerardin ,  Patrick Massi ,  Victor Spagnol

发明人： Pierre Gerardin ,  Patrick Massi ,  Victor Spagnol

IPC分类号： G01R3108

CPC分类号： H04L47/30 ,  H04L47/10 ,  H04L47/29 ,  H04L47/32

摘要： Method and system for tracking transient errors and controlling data traffic in a high speed packet switching network node. The traffic exits each node through a transmit queue per connection between end users. The queue is monitored at both queue level through a threshold based mechanism (53) and a control of time activity mechanism (55). If trouble is detected by any one of these mechanisms, the queue packet admission is momentarily barred. To that end, a Line Resources Manager (LRM) provides queue threshold and time-out references and keeps monitoring the node global buffering memory available. If required, the LRM may also report to Network Management facilities for possible rerouting of the traffic.

摘要翻译： 用于跟踪高速分组交换网络节点中的瞬态错误和控制数据流量的方法和系统。 流量通过终端用户之间的每个连接通过发送队列退出每个节点。队列通过基于阈值的机制（53）和时间活动机制（55）的控制在队列级监视。 如果这些机制中的任何一种检测到故障，则队列报文进入被暂时禁止。 为此，线路资源管理器（LRM）提供了队列阈值和超时参考，并且保持对可用的节点全局缓冲存储器的监视。 如果需要，LRM还可以向网络管理设施报告可能重新路由流量。

公开(公告)号：US4734676A

公开(公告)日：1988-03-29

申请号：US745548

申请日：1985-05-17

申请人： Simon Huon ,  Victor Spagnol

发明人： Simon Huon ,  Victor Spagnol

IPC分类号： G06F13/00 ,  H03K5/19 ,  H04L1/24 ,  H04L7/04 ,  H04L7/08 ,  H04L13/18 ,  H04L29/02 ,  H04L29/06 ,  H04L29/14 ,  G05B1/00 ,  G06F7/38

CPC分类号： H04L1/24 ,  H04L7/042

摘要： Memory 60 contains a decision table which is a replica of the particular N-bit pattern to be detected. When a bit is received over line 12, a table lookup operation is performed to determine whether the entry at the address indicated by address counter 34 contains a bit that matches the received bit. If so, the content of the address counter is incremented by one and the device waits for another bit to be received over line 12. If the bit in the entry does not match the received bit, then, if the address indicated by the counter is zero, the count of the counter is maintained at zero and the device waits for another bit to be received; or, if the address is different from zero, the counter is reset to zero and the bit present on line 12 is again presented to the table in order, this time, to be compared with the bit in the entry at address zero. The pattern is detected when the address contained in the counter is equal to N and when the last bit in the pattern matches the bit with which it is compared.

摘要翻译： 存储器60包含作为要检测的特定N位模式的副本的判定表。 当通过线路12接收到一个位时，执行表查找操作以确定由地址计数器34指示的地址处的条目是否包含与所接收的比特匹配的比特。 如果是，则地址计数器的内容增加1，并且设备等待通过线路12接收另一位。如果条目中的比特与接收的比特不匹配，则如果计数器指示的地址是 零，计数器的计数保持为零，器件等待另一位被接收; 或者，如果地址不同于零，则将计数器复位为零，并且将存在于行12上的位按次序再次呈现给表，此时，与地址0的条目中的位进行比较。 当计数器中包含的地址等于N时，并且模式中的最后一位匹配与其进行比较的位时，检测该模式。

公开(公告)号：US5261099A

公开(公告)日：1993-11-09

申请号：US908621

申请日：1992-06-29

申请人： Firmin Bigo ,  Victor Spagnol

发明人： Firmin Bigo ,  Victor Spagnol

IPC分类号： G06F9/48 ,  G06F13/372 ,  G06F13/24

CPC分类号： G06F9/4887

摘要： Fast scheduling mechanism of tasks to be performed in a communication system, like a modem, and the scheduler for implementing the mechanism.The communication system receives, synchronously to a rate determined by a high priority program, data to be processed by the tasks of a lower priority main program.Instead of scheduling the tasks immediately upon requests generated by an interrupt program, said tasks are scheduled with a controled delay relatively to their corresponding requests. Thus, free processing windows are created for execution of asynchronous tasks or synchronous transient overloads. Overall, more synchronous and asynchronous tasks can be performed without increasing processing power.

摘要翻译： 在通信系统（如调制解调器）中执行的任务的快速调度机制以及用于实现机制的调度器。 通信系统与由高优先级程序确定的速率同步接收要由较低优先级主程序的任务处理的数据。 而不是在由中断程序产生的请求上立即调度任务，所述任务以相对于其相应请求的控制延迟进行调度。 因此，创建用于执行异步任务或同步瞬态过载的自由处理窗口。 总而言之，可以在不增加处理能力的情况下执行更多的同步和异步任务。

公开(公告)号：US4751510A

公开(公告)日：1988-06-14

申请号：US855255

申请日：1986-04-24

申请人： Francois de Saint Michel ,  Jacques Belloc ,  Jean Cholat-Namy ,  Michel Choquet ,  Simon Huon ,  Daniel Pilost ,  Victor Spagnol

发明人： Francois de Saint Michel ,  Jacques Belloc ,  Jean Cholat-Namy ,  Michel Choquet ,  Simon Huon ,  Daniel Pilost ,  Victor Spagnol

IPC分类号： H04L29/14 ,  H04L1/24 ,  H04L12/26 ,  H04Q9/00

CPC分类号： H04L43/50 ,  H04L1/24 ,  H04L12/2697

摘要： A DTE can control the modems attached thereto by transmitting command messages over the data path and analyzing report messages supplied by the modems in return. Each command message is identified by a specific header. A command message intended for a remote modem (34) is intercepted by the local modem (30) and reformatted so as to obtain a supervisory message that is then transmitted at the rate of one bit per baud. A command message intended for a remote multichannel modem (48) is transmitted either by a supervisory message or in the data mode of operation.

摘要翻译： DTE可以通过在数据路径上发送命令消息并分析调制解调器提供的报告消息来控制附加的调制解调器。 每个命令消息由特定头标识。 用于远程调制解调器（34）的命令消息被本地调制解调器（30）拦截并重新格式化，以便获得一个监控消息，然后以每个波特率一位的速率传输。 用于远程多信道调制解调器（48）的命令消息由监视消息或数据操作模式传输。