SYSTEMS AND METHODS FOR ANALOG PROCESSING OF PROBLEM GRAPHS HAVING ARBITRARY SIZE AND/OR CONNECTIVITY

    公开(公告)号:US20200167685A1

    公开(公告)日:2020-05-28

    申请号:US16778295

    申请日:2020-01-31

    Abstract: Computational systems implement problem solving using hybrid digital/quantum computing approaches. A problem may be represented as a problem graph which is larger and/or has higher connectivity than a working and/or hardware graph of a quantum processor. A quantum processor may be used determine approximate solutions, which solutions are provided as initial states to one or more digital processors which may implement classical post-processing to generate improved solutions. Techniques for solving problems on extended, more-connected, and/or “virtual full yield” variations of the processor's actual working and/or hardware graphs are provided. A method of operation in a computational system comprising a quantum processor includes partitioning a problem graph into sub-problem graphs, and embedding a sub-problem graph onto the working graph of the quantum processor. The quantum processor and a non-quantum processor-based device generate partial samples. A controller causes a processing operation on the partial samples to generate complete samples.

    SYSTEMS AND METHODS FOR ANALOG PROCESSING OF PROBLEM GRAPHS HAVING ARBITRARY SIZE AND/OR CONNECTIVITY

    公开(公告)号:US20220335320A1

    公开(公告)日:2022-10-20

    申请号:US17739411

    申请日:2022-05-09

    Abstract: Computational systems implement problem solving using hybrid digital/quantum computing approaches. A problem may be represented as a problem graph which is larger and/or has higher connectivity than a working and/or hardware graph of a quantum processor. A quantum processor may be used determine approximate solutions, which solutions are provided as initial states to one or more digital processors which may implement classical post-processing to generate improved solutions. Techniques for solving problems on extended, more-connected, and/or “virtual full yield” variations of the processor's actual working and/or hardware graphs are provided. A method of operation in a computational system comprising a quantum processor includes partitioning a problem graph into sub-problem graphs, and embedding a sub-problem graph onto the working graph of the quantum processor. The quantum processor and a non-quantum processor-based device generate partial samples. A controller causes a processing operation on the partial samples to generate complete samples.

    Systems and methods for finding quantum binary optimization problems

    公开(公告)号:US10275422B2

    公开(公告)日:2019-04-30

    申请号:US14671862

    申请日:2015-03-27

    Abstract: Methods and systems represent constraint as an Ising model penalty function and a penalty gap associated therewith, the penalty gap separating a set of feasible solutions to the constraint from a set of infeasible solutions to the constraint; and determines the Ising model penalty function subject to the bounds on the programmable parameters imposed by the hardware limitations of the second processor, where the penalty gap exceeds a predetermined threshold greater than zero. Such may be employed to find quantum binary optimization problems and associated gap values employing a variety of techniques.

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