公开(公告)号：US20060017673A1

公开(公告)日：2006-01-26

申请号：US10938532

申请日：2004-09-13

Applicant: Brian Chen ,  Eric Lin

Inventor： Brian Chen ,  Eric Lin

IPC: G09G3/36

CPC classification number: G06F1/1616 ,  G06F1/1652 ,  G06F1/1656 ,  G06F1/1698

Abstract: The present invention provides a display device, comprising: an input unit, for inputting a data; a storage unit, for storing the input data; an output unit, for displaying the data; a control unit, electrically connected to the input unit, the output unit and the storage unit for controlling the same; a power supply, electrically connected to the input unit, the output unit and the storage unit for providing power to the same; and a housing; wherein the input unit, the output unit, the storage unit, the control unit and the power supply are arranged inside an accommodation space of the housing. In addition, the output unit can be a flexible paper-like display.

Abstract translation: 本发明提供了一种显示装置，包括：输入单元，用于输入数据; 存储单元，用于存储输入数据; 输出单元，用于显示数据; 电连接到输入单元的控制单元，用于控制单元的输出单元和存储单元; 电连接到输入单元，输出单元和存储单元，用于向其提供电力; 和房屋; 其中所述输入单元，所述输出单元，所述存储单元，所述控制单元和所述电源被布置在所述壳体的容纳空间的内部。 此外，输出单元可以是柔性的纸状显示器。

公开(公告)号：US20060002386A1

公开(公告)日：2006-01-05

申请号：US10881226

申请日：2004-06-30

Applicant: James Yik ,  Rong-Feng Chang ,  Eric Lin ,  John Ta ,  Craig Barrack

Inventor： James Yik ,  Rong-Feng Chang ,  Eric Lin ,  John Ta ,  Craig Barrack

IPC: H04L12/56

CPC classification number: H04L49/3063 ,  H04L49/201 ,  H04L49/602

Abstract: A packet switching node having a pipelined packet processing architecture processing packets received via an input port associated with the packet switching node is presented. The method performed by the apparatus includes: determining a packet frame type of the packet received; selectively extracting packet header field values specific to a packet frame type, the extracted packet header field value including packet addressing information; ascribing to the packet a preliminary action to be performed in respect of the packet; searching packet switching information tracked by the packet switching node based on extracted packet addressing information; formulating a preliminary switch response for the packet; classifying the packet into one of a plurality of packet flows; modifying the preliminary switch response in accordance with one of the preliminary action, the packet flow into which the packet was classified, and a default port action corresponding to the input port; modifying the packet header in accordance with one of the preliminary action, the packet flow, and the default port action; and processing the packet in accordance with the switch response. Advantages are derived from: pipelined processing of packets which enables short-cutting the rest of the processing for improper packets; a flexible frame type determination which is fast for well know frame types yet flexible in support of new frame types delaying obsolescence of a particular implementation; an early determination of a processing action which is successively refined by subsequent stages; a combined Layer-2 and Layer-3 network addressing search engine operating on short bit length indexed Layer-2 and Layer-3 network addresses reducing network address table storage requirements, requiring a reduced data transfer bandwidth for network address table access, a large external hashed primary network address table, and a small internal secondary network address table; an early determination of a switch response; and packet-classification-based switch response and packet header modification.

公开(公告)号：US20060002292A1

公开(公告)日：2006-01-05

申请号：US10903437

申请日：2004-07-30

Applicant: Rong-Feng Chang ,  Eric Lin ,  Craig Barrack

Inventor： Rong-Feng Chang ,  Eric Lin ,  Craig Barrack

IPC: H04L1/00

CPC classification number: H04L12/462 ,  H04L43/10 ,  H04L45/02 ,  H04L45/22 ,  H04L45/28

Abstract: A hardware-based failover scheme enabling rapid end-to-end recovery is provided. Hardware logic periodically generates, transmits, receives, and processes heartbeat packets, sent from one end of the communications network to another, and then returned back. If a communications network node or communications link failure is being experienced along the transport path, then the hardware logic rapidly swaps the affected traffic conveyed to a pre-established backup transport path, typically within microseconds. Advantages are derived from the rapid failover effected end-to-end which enables continued delivery of provisioned communications services improving the resiliency and/or availability of a communications network.

Abstract translation: 提供了基于硬件的故障转移方案，实现快速的端到端恢复。 硬件逻辑周期性地生成，发送，接收和处理从通信网络的一端发送到另一端的心跳信息包，然后返回。 如果沿着传输路径遇到通信网络节点或通信链路故障，则硬件逻辑快速地将传送到预先建立的备份传输路径的受影响的业务交换，通常在微秒内。 优点来源于端对端的快速故障转移，从而能够持续提供所提供的通信服务，从而提高通信网络的弹性和/或可用性。

公开(公告)号：USD467440S1

公开(公告)日：2002-12-24

申请号：US29158126

申请日：2002-03-28

Applicant: Glenn Lindaman ,  Eric Lin

Designer： Glenn Lindaman ,  Eric Lin

公开(公告)号：US08015557B2

公开(公告)日：2011-09-06

申请号：US12613295

申请日：2009-11-05

Applicant: Miaobo Chen ,  Qi Zhang ,  Eric Lin ,  Jianhui Li ,  Yun Wang

Inventor： Miaobo Chen ,  Qi Zhang ,  Eric Lin ,  Jianhui Li ,  Yun Wang

IPC: G06F9/44

CPC classification number: G06F9/45516

Abstract: Methods and apparatus to support the execution of a managed application that is linked to a native library or application are disclosed. The disclosed methods and apparatus support a virtual machine that is associated with the same ISA as the executing platform, while the ISA of the native library or application is of a different ISA. The disclosed methods and apparatus also support the execution of a managed application that is linked with several native libraries or applications that are associated with several different ISAs respectively.

Abstract translation: 公开了支持与本地库或应用相关联的被管理应用的执行的方法和装置。 所公开的方法和装置支持与执行平台相同的ISA相关联的虚拟机，而本地库或应用的ISA是不同的ISA。 所公开的方法和装置还支持与分别与若干不同的ISA相关联的几个本地库或应用链接的被管理应用的执行。

公开(公告)号：US07813263B2

公开(公告)日：2010-10-12

申请号：US10903437

申请日：2004-07-30

Applicant: Rong-Feng Chang ,  Eric Lin ,  Craig Barrack

Inventor： Rong-Feng Chang ,  Eric Lin ,  Craig Barrack

IPC: G01R31/08 ,  G06F11/00

CPC classification number: H04L12/462 ,  H04L43/10 ,  H04L45/02 ,  H04L45/22 ,  H04L45/28

Abstract: A hardware-based failover scheme enabling rapid end-to-end recovery is provided. Hardware logic periodically generates, transmits, receives, and processes heartbeat packets, sent from one end of the communications network to another, and then returned back. If a communications network node or communications link failure is being experienced along the transport path, then the hardware logic rapidly swaps the affected traffic conveyed to a pre-established backup transport path, typically within microseconds. Advantages are derived from the rapid failover effected end-to-end which enables continued delivery of provisioned communications services improving the resiliency and/or availability of a communications network.

Abstract translation: 提供了基于硬件的故障转移方案，实现快速的端到端恢复。 硬件逻辑周期性地生成，发送，接收和处理从通信网络的一端发送到另一端的心跳信息包，然后返回。 如果沿着传输路径遇到通信网络节点或通信链路故障，则硬件逻辑快速地将传送到预先建立的备份传输路径的受影响的业务交换，通常在微秒内。 优点来源于端对端的快速故障转移，从而能够持续提供所提供的通信服务，从而提高通信网络的弹性和/或可用性。

公开(公告)号：US07760719B2

公开(公告)日：2010-07-20

申请号：US10881226

申请日：2004-06-30

Applicant: James Yik ,  Rong-Feng Chang ,  Eric Lin ,  John Ta ,  Craig Barrack

Inventor： James Yik ,  Rong-Feng Chang ,  Eric Lin ,  John Ta ,  Craig Barrack

IPC: H04L12/28

CPC classification number: H04L49/3063 ,  H04L49/201 ,  H04L49/602

Abstract: A packet switching node in a pipelined architecture processing packets received via an input port associated with the packet switching node performs a method, which includes: determining a packet frame type; selectively extracting packet header field values specific to a packet frame type, including packet addressing information; ascribing to the packet a preliminary action to be performed; searching packet switching information tracked by the packet switching node based on extracted packet addressing information; formulating a preliminary switch response for the packet; classifying the packet into a packet flow; modifying the preliminary switch response in accordance with one of the preliminary action, the packet flow into which the packet was classified, and a default port action corresponding to the input port; modifying the packet header in accordance with one of the preliminary action, the packet flow, and the default port action; and processing the packet.

Abstract translation: 处理经由与分组交换节点相关联的输入端口接收的分组的流水线架构中的分组交换节点执行一种方法，其包括：确定分组帧类型; 选择性地提取特定于分组帧类型的分组报头字段值，包括分组寻址信息; 归因于要执行的初步动作; 基于提取的分组寻址信息来搜索由分组交换节点跟踪的分组交换信息; 制定分组的初步切换响应; 将分组分组成分组流; 根据预备动作，数据包被分类到的分组流中的一个以及与输入端口对应的默认端口动作来修改初始切换响应; 根据预备动作，分组流和默认端口动作之一修改分组报头; 并处理数据包。

公开(公告)号：US07415701B2

公开(公告)日：2008-08-19

申请号：US11060333

申请日：2005-02-17

Applicant: Yun Wang ,  Miaobo Chen ,  Eric Lin ,  Chris Elford ,  Suresh Srinivas

Inventor： Yun Wang ,  Miaobo Chen ,  Eric Lin ,  Chris Elford ,  Suresh Srinivas

IPC: G06F9/44 ,  G06F7/38

CPC classification number: G06F9/45516 ,  G06F9/445

Abstract: Methods and apparatus to support the execution of a managed application that is linked to a native library or application are disclosed. The disclosed methods and apparatus support a virtual machine that is associated with the same ISA as the executing platform, while the ISA of the native library or application is of a different ISA. The disclosed methods and apparatus also support the execution of a managed application that is linked with several native libraries or applications that are associated with several different ISAs respectively.

Abstract translation: 公开了支持与本地库或应用相关联的被管理应用的执行的方法和装置。 所公开的方法和装置支持与执行平台相同的ISA相关联的虚拟机，而本地库或应用的ISA是不同的ISA。 所公开的方法和装置还支持与分别与若干不同的ISA相关联的几个本地库或应用链接的被管理应用的执行。

公开(公告)号：US20080066011A1

公开(公告)日：2008-03-13

申请号：US11622329

申请日：2007-01-11

Applicant: Roger Urrabazo ,  Kumiko T. Toft ,  Eric Lin ,  John La ,  Sushant Kumar ,  Eric Del Balso ,  Michael Mills ,  Manlio Armando Lo Conte

Inventor： Roger Urrabazo ,  Kumiko T. Toft ,  Eric Lin ,  John La ,  Sushant Kumar ,  Eric Del Balso ,  Michael Mills ,  Manlio Armando Lo Conte

IPC: G06F3/048

CPC classification number: H04N5/765 ,  H04N5/782 ,  H04N21/2747

Abstract: The present invention is directed to a system and method for visualizing information, e.g., information regarding a sporting event. The method may comprise identifying an event type and generating a plurality of buttons, the plurality of buttons arranged in a button hierarchy. A first level of the button hierarchy comprising one or more first level buttons is displayed with a lens further displayed on a given one of the one or more first level buttons, the lens operative to present first level data for the given first level button.

Abstract translation: 本发明涉及一种用于可视化信息的系统和方法，例如关于体育赛事的信息。 该方法可以包括识别事件类型并生成多个按钮，所述多个按钮以按钮层次结构排列。 显示包括一个或多个第一级按钮的按钮层次结构的第一级别，其中进一步显示在所述一个或多个第一级按钮中的给定的一个上的透镜，所述透镜可操作以呈现给定的第一级按钮的第一级数据。

公开(公告)号：US20070090284A1

公开(公告)日：2007-04-26

申请号：US11256366

申请日：2005-10-20

Applicant: Mon Ho ,  Chen Peng ,  May Chen ,  Eric Lin

Inventor： Mon Ho ,  Chen Peng ,  May Chen ,  Eric Lin

IPC: H01J5/02

CPC classification number: H01L27/14618 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2924/16195 ,  H01L2924/00014 ,  H01L2924/00

Abstract: An image sensor package structure includes a substrate having an upper surface, which is formed with equal amount of the first electrodes arranged at the each side of the upper surface, each the first electrode of the adjacent side of the substrate is corresponding electrically connected each other, so that the signal from one side of the substrate may be transmitted the adjacent side, the each side of the lower surface of the substrate is formed with second electrodes, each side of the second electrodes is less than the each side of the first electrodes of the upper surface, then the second electrode is electrically connected to the first electrode, so that the signal from the first electrode may be directly transmitted to the second electrode and through adjacent one side of the first electrode transmitted to the second electrode. A frame layer is arranged at the upper surface of the substrate. A chip is mounted at the upper surface of the substrate a, at least one side of the chip is formed with bonding pads, which are equal or not many than the first electrodes of the one side of the substrate. Wires are electrically connected the pads of the chip to the first electrodes of the substrate. A transparent layer is covered on the frame layer to encapsulate the chip.

Abstract translation: 图像传感器封装结构包括具有上表面的基板，其形成有布置在上表面的每一侧的等量的第一电极，基板的相邻侧的每个第一电极彼此相互电连接 ，使得来自基板的一侧的信号可以相邻地传输，基板的下表面的每一侧形成有第二电极，第二电极的每侧都小于第一电极的每一侧 然后第二电极电连接到第一电极，使得来自第一电极的信号可以直接传输到第二电极并且通过传输到第二电极的第一电极的相邻一侧。 框架层布置在基板的上表面。 芯片安装在基板a的上表面，芯片的至少一侧形成有与基板一侧的第一电极相等或不多的接合焊盘。 电线将芯片的焊盘电连接到衬底的第一电极。 透明层被覆盖在帧层上以封装芯片。