System for high speed serial video signal transmission using DC-balanced
coding

    公开(公告)号:US5974464A

    公开(公告)日:1999-10-26

    申请号:US723694

    申请日:1996-09-30

    摘要: A new high-speed digital interface for transmitting video information over various transmission media including terminated copper wires such as twisted-pair wires and fiber optical cable is described. The significance of this new interface is that (1) it only uses a small number of data channels with all timing and control data embedded in data transmission, (2) it uses a transition controlled binary DC balanced coding for reliable, low-power and high-speed data transmission, (3) it uses low-swing differential voltage which minimizes EMI, and (4) it can be implemented in low-cost scaleable CMOS technology as a megacell or standard IC. The high-speed digital interface incorporates a method and apparatus for producing a transition-controlled, DC-balanced sequence of characters from an input sequence of data bytes. The bits in each of the data bytes are selectively complemented in accordance with the number of logical transitions in each data byte in order to produce selectively complemented data blocks. A cumulative disparity is then determined between the logical values of different type included within ones of the selectively complemented data blocks previously encoded into characters. In addition, a current disparity in a candidate character associated with a current one of the selectively complemented data blocks being encoded is also determined. The candidate character is assigned to the current one of the selectively complemented data blocks if the current disparity is of a polarity opposite to a first polarity of the cumulative disparity. Alternately, the complement of the candidate character is assigned to the current one of the selectively complemented data blocks if the current disparity is of the first polarity. In a high-transition mode of operation, the bits within data blocks including less than a minimum number of logical transitions are selectively complemented so that each such selectively complemented data block includes in excess of the minimum number of logical transitions. In a low-transition mode of operation, the bits within data blocks having more than a predefined number of logical transitions are selectively complemented so that each such selectively complemented data block includes less than the maximum number of logical transitions.

    Transition-controlled digital encoding and signal transmission system
    12.
    发明授权
    Transition-controlled digital encoding and signal transmission system 失效
    过渡控制数字编码和信号传输系统

    公开(公告)号:US5999571A

    公开(公告)日:1999-12-07

    申请号:US539816

    申请日:1995-10-05

    摘要: A method and apparatus for producing a transition-controlled, DC-balanced sequence of characters from an input sequence of data bytes is disclosed herein. The bits in each of the data bytes are selectively complemented in accordance with the number of logical transitions in each data byte in order to produce selectively complemented data blocks. A cumulative disparity is then determined between the logical values of different type included within ones of the selectively complemented data blocks previously encoded into characters. In addition, a current disparity in a candidate character associated with a current one of the selectively complemented data blocks being encoded is also determined. The candidate character is assigned to the current one of the selectively complemented data blocks if the current disparity is of a polarity opposite to a first polarity of the cumulative disparity. Alternately, the complement of the candidate character is assigned to the current one of the selectively complemented data blocks if the current disparity is of the first polarity. In a high-transition mode of operation, the bits within data blocks including less than a minimum number of logical transitions are selectively complemented so that each such selectively complemented data block includes in excess of the minimum number of logical transitions. In a low-transition mode of operation, the bits within data blocks having more than a predefined number of logical transitions are selectively complemented so that each such selectively complemented data block includes less than the maximum number of logical transitions.

    摘要翻译: 本文公开了一种用于从数据字节的输入序列产生转换控制的直流平衡字符序列的方法和装置。 每个数据字节中的位根据每个数据字节中的逻辑转换的数量来选择性地补充,以便产生选择性补充的数据块。 然后在包括在先前编码为字符的选择性补充的数据块中的不同类型的逻辑值之前确定累积差异。 此外,还确定与被编码的选择性补充的数据块中的当前一个相关联的候选字符中的当前差异。 如果当前视差与累积视差的第一极性相反的极性,则候选字符被分配给选择性补充的数据块中的当前一个。 或者,如果当前视差是第一极性,则候选字符的补码被分配给选择性补充的数据块中的当前一个。 在高转换操作模式中,选择性地补充包括小于最小数量的逻辑转换的数据块内的位,使得每个这样的选择性补充的数据块包括超过最小数量的逻辑转换。 在低转换操作模式中,选择性地补充具有多于预定数量的逻辑转换的数据块内的位,使得每个这样的选择性补充的数据块包括小于逻辑转换的最大数量。