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公开(公告)号：US08306218B2
公开(公告)日：2012-11-06
申请号：US10467698
申请日：2002-02-06
Applicant: Fabrice Romain , Yannick Teglia
Inventor： Fabrice Romain , Yannick Teglia
IPC: G06F21/00
CPC classification number: H04L9/0625 , G06F2207/7219 , H04L9/003 , H04L2209/046 , H04L2209/24
Abstract: The protected method of cryptographic computation includes N computation rounds successively performed to produce an output data from an input data and a private key. The method also includes a first masking stage to mask the input data, so that each intermediate data used or produced by a computation round is masked, and a second masking stage to mask data manipulated inside each computation round.
Abstract translation: 受保护的密码计算方法包括从输入数据和私钥产生输出数据的N次计算循环。 该方法还包括用于屏蔽输入数据的第一掩蔽阶段，使得由计算轮次使用或产生的每个中间数据被屏蔽，以及第二掩蔽阶段来掩蔽在每个计算周期内操纵的数据。
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公开(公告)号：US08102997B2
公开(公告)日：2012-01-24
申请号：US11547195
申请日：2004-03-29
Applicant: Yannick Teglia , Fabrice Romain , Pierre-Yvan Liardet , Pasqualina Fragneto , Fabio Sozzani , Guido Bertoni
Inventor： Yannick Teglia , Fabrice Romain , Pierre-Yvan Liardet , Pasqualina Fragneto , Fabio Sozzani , Guido Bertoni
CPC classification number: H04L9/0631 , H04L9/003 , H04L2209/046 , H04L2209/08 , H04L2209/122
Abstract: A processor for executing a Rijndeal algorithm which applies a plurality of encryption rounds to a data block array in order to obtain an array of identical size, each round involving a key block array and a data block substitution table, wherein said processor comprises: a first input register (102) containing an input data block column; an output register (111) containing an output data block column or an intermediate block column; a second input register (101) containing a key block column or the intermediate data blocks; a block substitution element (104) receiving the data one block at a time following the selection (103) thereof in the first register and providing, for each block, a column of blocks; an element (109) applying a cyclic permutation to the substitution circuit column blocks; and an Exclusive-OR combination element (110) combining the permutation circuit column blocks with the content of the second register, the result of said combination being loaded into the output register.
Abstract translation: 一种用于执行Rijndeal算法的处理器，该Rijndeal算法将多个加密回合应用于数据块阵列，以便获得相同大小的阵列，每轮涉及密钥块阵列和数据块替换表，其中所述处理器包括：第一 输入寄存器（102），其包含输入数据块列; 包含输出数据块列或中间块列的输出寄存器（111）; 包含密钥块列或中间数据块的第二输入寄存器（101）; 块替换元件（104）在第一寄存器中的选择（103）之后的时间接收数据一个块，并为每个块提供一列块; 向替代电路列块施加循环置换的元件（109）; 以及将置换电路列块与第二寄存器的内容组合的异或组合元件（110），所述组合的结果被加载到输出寄存器中。
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13.发明申请COUNTERMEASURE METHOD AND DEVICE FOR PROTECTING DATA CIRCULATING IN AN ELECTRONIC COMPONENT 有权用于保护电子元件数据循环的计量方法和装置公开(公告)号：US20110176674A1
公开(公告)日：2011-07-21
申请号：US13007116
申请日：2011-01-14
Applicant: Fabrice Romain
Inventor： Fabrice Romain
CPC classification number: H04L9/0618 , H04L9/002 , H04L2209/12
Abstract: The present disclosure relates to a countermeasure method in an integrated circuit comprising at least one first logic circuit and at least one first input register supplying the first logic circuit with a datum, the method comprising steps of introducing a random datum into each first input register of the first logic circuit and of the first logic circuit reading the random datum in each first input register, then of introducing a datum to be processed into each first input register, and of the first logic circuit processing the datum in each first input register.
Abstract translation: 本公开涉及一种集成电路中的对策方法，包括至少一个第一逻辑电路和向第一逻辑电路提供数据的至少一个第一输入寄存器，该方法包括以下步骤：将随机数据引入到第一逻辑电路的每个第一输入寄存器 第一逻辑电路和第一逻辑电路读取每个第一输入寄存器中的随机数据，然后将要处理的数据引入每个第一输入寄存器，以及处理每个第一输入寄存器中的数据的第一逻辑电路。
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公开(公告)号：US20050238120A1
公开(公告)日：2005-10-27
申请号：US11111241
申请日：2005-04-21
Applicant: Yveline Guilloux , Romain Palmade , Fabrice Romain , Sylvie Wuidart
Inventor： Yveline Guilloux , Romain Palmade , Fabrice Romain , Sylvie Wuidart
CPC classification number: H04L27/06 , H04L25/069
Abstract: A method and a circuit for detecting a binary state supported by an analog symbol, comprising sampling the symbol with a sampling signal based on a frequency having a period shorter than the duration of a symbol, selecting a number of significant samples smaller than the number of samples which would be obtained with a sampling of the symbol at said frequency, and deciding of the symbol state based on the selected samples.
Abstract translation: 一种用于检测由模拟符号支持的二进制状态的方法和电路，包括基于具有比符号的持续时间短的周期的频率的采样信号对所述符号进行采样，选择少于所述符号的数量的有效样本数 将利用所述频率处的符号采样获得的采样，以及基于所选择的采样来确定符号状态。
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15.发明授权Countermeasure method and device for protecting data circulating in an electronic component 有权用于保护在电子部件中循环的数据的对策方法和装置公开(公告)号：US08958549B2
公开(公告)日：2015-02-17
申请号：US13007116
申请日：2011-01-14
Applicant: Fabrice Romain
Inventor： Fabrice Romain
CPC classification number: H04L9/0618 , H04L9/002 , H04L2209/12
Abstract: The present disclosure relates to a countermeasure method in an integrated circuit comprising at least one first logic circuit and at least one first input register supplying the first logic circuit with a datum, the method comprising steps of introducing a random datum into each first input register of the first logic circuit and of the first logic circuit reading the random datum in each first input register, then of introducing a datum to be processed into each first input register, and of the first logic circuit processing the datum in each first input register.
Abstract translation: 本公开涉及一种集成电路中的对策方法，包括至少一个第一逻辑电路和向第一逻辑电路提供数据的至少一个第一输入寄存器，该方法包括以下步骤：将随机数据引入到第一逻辑电路的每个第一输入寄存器 第一逻辑电路和第一逻辑电路读取每个第一输入寄存器中的随机数据，然后将要处理的数据引入每个第一输入寄存器，以及在每个第一输入寄存器中处理该数据的第一逻辑电路。
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Patent Agency Ranking
公开(公告)号：US08775697B2
公开(公告)日：2014-07-08
申请号：US12743684
申请日：2008-10-18
Applicant: Fabrice Romain , Jean-Louis Modave
Inventor： Fabrice Romain , Jean-Louis Modave
CPC classification number: G06F21/606 , G06F21/755
Abstract: A method and a circuit for checking data transferred between a circuit and a processing unit, in which: the data originating from the circuit transit through a first buffer element having a size which is a multiple of the size of data to be subsequently delivered over a bus of the processing unit; an address provided by the processing unit for the circuit is temporarily stored in a second element; and the content of the first element is compared with current data originating from the circuit, at least when they correspond to an address of data already present in this first element.
Abstract translation: 一种用于检查在电路和处理单元之间传送的数据的方法和电路，其中：从电路发出的数据通过第一缓冲元件，该第一缓冲元件的尺寸是要随后传送的数据的大小的倍数 总线处理单元; 由电路处理单元提供的地址暂时存储在第二元件中; 并且将第一元素的内容与来自电路的当前数据进行比较，至少当它们对应于已经存在于该第一元素中的数据的地址时。
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公开(公告)号：US20080285745A1
公开(公告)日：2008-11-20
申请号：US11547195
申请日：2004-03-29
Applicant: Yannick Teglia , Fabrice Romain , Pierre-Yvan Liardet , Pasqualina Fragneto , Fabio Sozzani , Guido Bertoni
Inventor： Yannick Teglia , Fabrice Romain , Pierre-Yvan Liardet , Pasqualina Fragneto , Fabio Sozzani , Guido Bertoni
IPC: H04L9/06
CPC classification number: H04L9/0631 , H04L9/003 , H04L2209/046 , H04L2209/08 , H04L2209/122
Abstract: A processor for executing a Rijndeal algorithm which applies a plurality of encryption rounds to a data block array in order to obtain an array of identical size, each round involving a key block array and a data block substitution table, wherein said processor comprises: a first input register (102) containing an input data block column; an output register (111) containing an output data block column or an intermediate block column; a second input register (101) containing a key block column or the intermediate data blocks; a block substitution element (104) receiving the data one block at a time following the selection (103) thereof in the first register and providing, for each block, a column of blocks; an element (109) applying a cyclic permutation to the substitution circuit column blocks; and an Exclusive-OR combination element (110) combining the permutation circuit column blocks with the content of the second register, the result of said combination being loaded into the output register.
Abstract translation: 一种用于执行Rijndeal算法的处理器，该Rijndeal算法将多个加密回合应用于数据块阵列，以便获得相同大小的阵列，每轮涉及密钥块阵列和数据块替换表，其中所述处理器包括：第一 输入寄存器（102），其包含输入数据块列; 包含输出数据块列或中间块列的输出寄存器（111）; 包含密钥块列或中间数据块的第二输入寄存器（101）; 块替换元件（104）在第一寄存器中的选择（103）之后的时间接收数据一个块，并为每个块提供一列块; 向替代电路列块施加循环置换的元件（109）; 以及将置换电路列块与第二寄存器的内容组合的异或组合元件（110），所述组合的结果被加载到输出寄存器中。
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18.发明申请METHOD FOR MANAGING THE DIALOGUE BETWEEN AN ITEM OF EQUIPMENT AND AT LEAST ONE MULTI-APPLICATION OBJECT 有权用于管理设备项目和至少一个多应用对象之间的对话方法公开(公告)号：US20130268123A1
公开(公告)日：2013-10-10
申请号：US13993609
申请日：2011-12-07
Applicant: Fabrice Romain , Christophe Cataldo , Christophe Mani , Sophie Gabriele
Inventor： Fabrice Romain , Christophe Cataldo , Christophe Mani , Sophie Gabriele
IPC: G05B15/02
CPC classification number: G05B15/02 , G06K7/0008 , G06K19/0723 , G06Q20/3574
Abstract: The subject comprises processing means configured for communicating with an item of equipment according to a contactless communication protocol containing an anticollision procedure; the processing means (MT) comprise several application modules (MA1, . . . MAj) respectively associated with several different identifiers (ID1, . . . IDj), and triggering means (MDCL) configured for causing a triggering of the said anticollision procedure between the said object and the said item of equipment.
Abstract translation: 主题包括被配置为根据包含防冲突过程的非接触式通信协议与设备项进行通信的处理装置; 处理装置（MT）包括分别与若干不同标识符（ID1，... IDj）相关联的多个应用模块（MA1，...，MAj），以及触发装置（MDCL），被配置为引起触发所述防冲突过程 所述物品和所述设备物品。
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公开(公告)号：US08243856B2
公开(公告)日：2012-08-14
申请号：US11111241
申请日：2005-04-21
Applicant: Yveline Guilloux , Romain Palmade , Fabrice Romain , Sylvie Wuidart
Inventor： Yveline Guilloux , Romain Palmade , Fabrice Romain , Sylvie Wuidart
CPC classification number: H04L27/06 , H04L25/069
Abstract: A method and a circuit for detecting a binary state supported by an analog symbol, comprising sampling the symbol with a sampling signal based on a frequency having a period shorter than the duration of a symbol, selecting a number of significant samples smaller than the number of samples which would be obtained with a sampling of the symbol at said frequency, and deciding of the symbol state based on the selected samples.
Abstract translation: 一种用于检测由模拟符号支持的二进制状态的方法和电路，包括基于具有比符号的持续时间短的周期的频率的采样信号对所述符号进行采样，选择少于所述符号的数量的有效样本数 将利用所述频率处的符号采样获得的采样，以及基于所选择的采样来确定符号状态。
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20.发明授权公开(公告)号：US07806319B2
公开(公告)日：2010-10-05
申请号：US11402650
申请日：2006-04-11
Applicant: Fabrice Romain , Alain Pomet
Inventor： Fabrice Romain , Alain Pomet
CPC classification number: G07F7/1008 , G06F21/75 , G06F21/77 , G06F21/79 , G06K19/073 , G06Q20/341 , G07F7/082 , H04L9/004
Abstract: A method and a circuit for protecting an integrated circuit against an extraction of data read from at least one memory, comprising the steps of comparing each data word to be output from the integrated circuit with at least one value stored in this circuit, and generating an error signal in case of an identity between the value and the data waiting to be output.
Abstract translation: 一种用于保护集成电路以防止从至少一个存储器读取的数据的提取的方法和电路，包括以下步骤：将从集成电路输出的每个数据字与存储在该电路中的至少一个值进行比较， 在值和等待输出的数据之间存在身份的情况下的错误信号。
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