公开(公告)号：US09443951B2

公开(公告)日：2016-09-13

申请号：US14076387

申请日：2013-11-11

Applicant: GLOBALFOUNDRIES INC.

Inventor： Josephine B. Chang ,  Paul Chang ,  Michael A. Guillorn ,  Jeffrey W. Sleight

IPC: H01L29/66 ,  H01L29/78 ,  H01L21/84 ,  H01L27/12

CPC classification number: H01L29/66484 ,  H01L21/845 ,  H01L27/1211 ,  H01L29/66795 ,  H01L29/7831 ,  H01L29/7848 ,  H01L29/785

Abstract: Fin-defining mask structures are formed over a semiconductor material layer having a first semiconductor material and a disposable gate structure is formed thereupon. A gate spacer is formed around the disposable gate structure and physically exposed portions of the fin-defining mask structures are subsequently removed. The semiconductor material layer is recessed employing the disposable gate structure and the gate spacer as an etch mask to form recessed semiconductor material portions. Embedded planar source/drain stressors are formed on the recessed semiconductor material portions by selective deposition of a second semiconductor material having a different lattice constant than the first semiconductor material. After formation of a planarization dielectric layer, the disposable gate structure is removed. A plurality of semiconductor fins are formed employing the fin-defining mask structures as an etch mask. A replacement gate structure is formed on the plurality of semiconductor fins.