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公开(公告)号:US11705455B2
公开(公告)日:2023-07-18
申请号:US16930547
申请日:2020-07-16
Applicant: GLOBALFOUNDRIES U.S. INC.
Inventor: Thorsten E. Kammler , Peter Baars
IPC: H01L27/092 , H01L21/8238 , H01L29/161 , H01L29/423 , H01L29/49 , H01L29/66 , H01L29/78
CPC classification number: H01L27/0928 , H01L21/823814 , H01L21/823842 , H01L21/823857 , H01L21/823892 , H01L29/161 , H01L29/42364 , H01L29/4966 , H01L29/66492 , H01L29/7833
Abstract: The present disclosure relates to semiconductor devices, and more particularly, to high voltage extended drain MOSFET (EDMOS) devices in a high-k metal gate (HKMG) and methods of manufacture. A structure of the present disclosure includes a plurality of extended drain MOSFET (EDMOS) devices on a high voltage well with a split-gate dielectric material including a first gate dielectric material and a second gate dielectric material, the second gate dielectric material including a thinner thickness than the first gate dielectric material, and a high-k dielectric material on the split-gate dielectric material.
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公开(公告)号:US11456364B2
公开(公告)日:2022-09-27
申请号:US17029446
申请日:2020-09-23
Applicant: GLOBALFOUNDRIES U.S. Inc.
Inventor: Ketankumar H. Tailor , Peter Baars , Ruchil K. Jain
Abstract: Embodiments of the disclosure provide an integrated circuit device and related methods. The disclosure may provide a transistor device, including: a gate structure; a drain extension region extending laterally from partially under the gate structure to a drain region; and a gate spacer located over the drain extension region. A silicide-blocking layer is over and in contact with the gate spacer. The silicide-blocking layer has a first end over the gate structure and a second, opposing end over the drain extension region. The structure also provides a conductive field plate, including a conductive layer over and in contact with the silicide-blocking layer. A field plate contact is formed on the conductive field plate.
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13.
公开(公告)号:US20220302306A1
公开(公告)日:2022-09-22
申请号:US17206195
申请日:2021-03-19
Applicant: GLOBALFOUNDRIES U.S. Inc.
Inventor: Ketankumar Harishbhai Tailor , Peter Baars
Abstract: An integrated circuit (IC) structure and a field plate are disclosed. The IC structure and field plate may find advantageous application with, for example, extended drain metal-oxide semiconductor (EDMOS) transistors. The IC structure includes a transistor including a metal gate structure and a drain extension region extending laterally from partially under the metal gate structure to a drain region. A metal field plate is over the drain extension region. Due to being formed simultaneously as part of a gate-last formation approach, the metal field plate has an upper surface coplanar with an upper surface of the metal gate structure. A field plate contact may be on the metal field plate.
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