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公开(公告)号：US10291813B2
公开(公告)日：2019-05-14
申请号：US14694806
申请日：2015-04-23
Applicant: Google LLC
Inventor： Albert Meixner , Jason Rupert Redgrave , Ofer Shacham , Qiuling Zhu , Daniel Frederic Finchelstein
Abstract: A sheet generator circuit is described. The sheet generator includes electronic circuitry to receive a line group of image data including multiple rows of data from a frame of image data. The multiple rows are sufficient in number to encompass multiple neighboring overlapping stencils. The electronic circuitry is to parse the line group into a smaller sized sheet. The electronic circuitry is to load the sheet into a data computation unit having a two dimensional shift array structure coupled to an array of processors.
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公开(公告)号：US10275253B2
公开(公告)日：2019-04-30
申请号：US15595632
申请日：2017-05-15
Applicant: Google LLC
Inventor： Albert Meixner , Jason Rupert Redgrave , Ofer Shacham , Daniel Frederic Finchelstein , Qiuling Zhu
Abstract: An apparatus that includes a program controller to fetch and issue instructions. The apparatus includes an execution lane having at least one execution unit to execute the instructions. The execution lane is part of an execution lane array that is coupled to a two dimensional shift register array structure, wherein, execution lane s of the execution lane array are located at respective array locations and are coupled to dedicated registers at same respective array locations in the two-dimensional shift register array.
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公开(公告)号：US20190004777A1
公开(公告)日：2019-01-03
申请号：US16122801
申请日：2018-09-05
Applicant: Google LLC
Inventor： Albert Meixner
Abstract: A method is described that includes translating higher level program code including higher level instructions having an instruction format that identifies pixels to be accessed from a memory with first and second coordinates from an orthogonal coordinate system into lower level instructions that target a hardware architecture having an array of execution lanes and a shift register array structure that is able to shift data along two different axis. The translating includes replacing the higher level instructions having the instruction format with lower level shift instructions that shift data within the shift register array structure.
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公开(公告)号：US09965824B2
公开(公告)日：2018-05-08
申请号：US14694828
申请日：2015-04-23
Applicant: Google LLC
Inventor： Qiuling Zhu , Ofer Shacham , Albert Meixner , Jason Rupert Redgrave , Daniel Frederic Finchelstein , David Patterson , Neeti Desai , Donald Stark , Edward T. Chang , William R. Mark
Abstract: An apparatus is described. The apparatus includes an image processing unit. The image processing unit includes a network. The image processing unit includes a plurality of stencil processor circuits each comprising an array of execution unit lanes coupled to a two-dimensional shift register array structure to simultaneously process multiple overlapping stencils through execution of program code. The image processing unit includes a plurality of sheet generators respectively coupled between the plurality of stencil processors and the network. The sheet generators are to parse input line groups of image data into input sheets of image data for processing by the stencil processors, and, to form output line groups of image data from output sheets of image data received from the stencil processors. The image processing unit includes a plurality of line buffer units coupled to the network to pass line groups in a direction from producing stencil processors to consuming stencil processors to implement an overall program flow.
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公开(公告)号：US11153464B2
公开(公告)日：2021-10-19
申请号：US16526063
申请日：2019-07-30
Applicant: Google LLC
Inventor： Ofer Shacham , Jason Rupert Redgrave , Albert Meixner , Qiuling Zhu , Daniel Frederic Finchelstein , David Patterson , Donald Stark
Abstract: An apparatus is described. The apparatus includes an execution lane array coupled to a two dimensional shift register array structure. Locations in the execution lane array are coupled to same locations in the two-dimensional shift register array structure such that different execution lanes have different dedicated registers.
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Patent Agency Ranking
公开(公告)号：US11140293B2
公开(公告)日：2021-10-05
申请号：US16786359
申请日：2020-02-10
Applicant: Google LLC
Inventor： Albert Meixner , Jason Rupert Redgrave , Ofer Shacham , Qiuling Zhu , Daniel Frederic Finchelstein
Abstract: A sheet generator circuit is described. The sheet generator includes electronic circuitry to receive a line group of image data including multiple rows of data from a frame of image data. The multiple rows are sufficient in number to encompass multiple neighboring overlapping stencils. The electronic circuitry is to parse the line group into a smaller sized sheet. The electronic circuitry is to load the sheet into a data computation unit having a two dimensional shift array structure coupled to an array of processors.
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公开(公告)号：US20210255972A1
公开(公告)日：2021-08-19
申请号：US17139750
申请日：2020-12-31
Applicant: Google LLC
Inventor： Vinod Chamarty , Xiaoyu Ma , Hongil Yoon , Keith Robert Pflederer , Weiping Liao , Benjamin Dodge , Albert Meixner , Allan Douglas Knies , Manu Gulati , Rahul Jagdish Thakur , Jason Rupert Redgrave
IPC: G06F13/16 , G06F12/0811 , G06F12/0877 , G06F12/0815
Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for a system-level cache to allocate cache resources by a way-partitioning process. One of the methods includes maintaining a mapping between partitions and priority levels and allocating primary ways to respective enabled partitions in an order corresponding to the respective priority levels assigned to the enabled partitions.
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公开(公告)号：US20210165656A1
公开(公告)日：2021-06-03
申请号：US17169814
申请日：2021-02-08
Applicant: Google LLC
Inventor： Albert Meixner
Abstract: An image processor is described. The image processor includes a two dimensional shift register array that couples certain ones of its array locations to support execution of a shift instruction. The shift instruction is to include mask information. The mask information is to specify which of the array locations are to be written to with information being shifted. The two dimensional shift register array includes masking logic circuitry to write the information being shifted into specified ones of the array locations in accordance with the mask information.
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公开(公告)号：US10996988B2
公开(公告)日：2021-05-04
申请号：US16658989
申请日：2019-10-21
Applicant: Google LLC
Inventor： Hyunchul Park , Albert Meixner
Abstract: A method is described. The method includes constructing an image processing software data flow in which a buffer stores and forwards image data being transferred from a producing kernel to one or more consuming kernels. The method also includes recognizing that the buffer has insufficient resources to store and forward the image data. The method also includes modifying the image processing software data flow to include multiple buffers that store and forward the image data during the transfer of the image data from the producing kernel to the one or more consuming kernels.
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公开(公告)号：US20210004633A1
公开(公告)日：2021-01-07
申请号：US17028097
申请日：2020-09-22
Applicant: Google LLC
Inventor： Ofer Shacham , David Patterson , William R. Mark , Albert Meixner , Daniel Frederic Finchelstein , Jason Rupert Redgrave
Abstract: A method is described that includes executing a convolutional neural network layer on an image processor having an array of execution lanes and a two-dimensional shift register. The two-dimensional shift register provides local respective register space for the execution lanes. The executing of the convolutional neural network includes loading a plane of image data of a three-dimensional block of image data into the two-dimensional shift register. The executing of the convolutional neural network also includes performing a two-dimensional convolution of the plane of image data with an array of coefficient values by sequentially: concurrently multiplying within the execution lanes respective pixel and coefficient values to produce an array of partial products; concurrently summing within the execution lanes the partial products with respective accumulations of partial products being kept within the two dimensional register for different stencils within the image data; and, effecting alignment of values for the two-dimensional convolution within the execution lanes by shifting content within the two-dimensional shift register array.
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