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公开(公告)号：US20050093869A1
公开(公告)日：2005-05-05
申请号：US10726180
申请日：2003-12-02
CPC分类号： H04N19/61
摘要： A system, method, and apparatus for decoding and displaying images utilizing two processors and two memory units. The decode process receives images which are encoded according to a predetermined standard. Included with the encoded images are parameters which facilitate the decode and display processes. The decode process decodes the encoded images and the encoded parameters and stores each image in a separate image buffer, and each set of associated parameters in a buffer descriptor structure associated with the image buffer. The decode process is carried on by the first processor. The display process utilizes the parameters associated with the image to determine the appropriate display order for each image, and then display the image accordingly on a display device, based on the associated parameters. The first processor carries on the display of the image on the display device. The second processor determines the display order for the images. The second processor and the second memory are off-chip.
摘要翻译： 一种使用两个处理器和两个存储器单元解码和显示图像的系统，方法和装置。 解码处理接收根据预定标准编码的图像。 编码图像包括有助于解码和显示过程的参数。 解码过程对编码图像和编码参数进行解码，并将每个图像存储在单独的图像缓冲器中，并将每个相关参数集合在与图像缓冲器相关联的缓冲器描述符结构中。 解码过程由第一处理器承载。 显示过程利用与图像相关联的参数来确定每个图像的适当显示顺序，然后基于相关参数在显示设备上相应地显示图像。 第一处理器在显示装置上进行图像的显示。 第二处理器确定图像的显示顺序。 第二处理器和第二存储器是片外的。
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公开(公告)号：US07159144B2
公开(公告)日：2007-01-02
申请号：US10600243
申请日：2003-06-20
申请人： Satheesh Babu , Santosh Savekar
发明人： Satheesh Babu , Santosh Savekar
IPC分类号： G06F11/00
CPC分类号： G06F11/3612
摘要： Disclosed herein are debugging tool(s) for profiling the frequency of execution of certain instructions in a host operation. The debugging tool causes interrupts to occur at random time intervals and records the address of the program counter at each interrupt. A profile is developed that indicates the frequency of execution of certain instructions after a statistically significant number of interrupts.
摘要翻译： 这里公开了用于在主机操作中分析特定指令的执行频率的调试工具。 调试工具会以随机时间间隔发生中断，并在每个中断时记录程序计数器的地址。 在统计上显着数目的中断之后，开发一个指定某些指令执行频率的配置文件。
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公开(公告)号：US07133046B2
公开(公告)日：2006-11-07
申请号：US10726180
申请日：2003-12-02
CPC分类号： H04N19/61
摘要： A system, method, and apparatus for decoding and displaying images utilizing two processors and two memory units. The decode process receives images which are encoded according to a predetermined standard. Included with the encoded images are parameters which facilitate the decode and display processes. The decode process decodes the encoded images and the encoded parameters and stores each image in a separate image buffer, and each set of associated parameters in a buffer descriptor structure associated with the image buffer. The decode process is carried on by the first processor. The display process utilizes the parameters associated with the image to determine the appropriate display order for each image, and then display the image accordingly on a display device, based on the associated parameters. The first processor carries on the display of the image on the display device. The second processor determines the display order for the images. The second processor and the second memory are off-chip.
摘要翻译： 一种使用两个处理器和两个存储器单元解码和显示图像的系统，方法和装置。 解码处理接收根据预定标准编码的图像。 编码图像包括有助于解码和显示过程的参数。 解码过程对编码图像和编码参数进行解码，并将每个图像存储在单独的图像缓冲器中，并将每个相关参数集合在与图像缓冲器相关联的缓冲器描述符结构中。 解码过程由第一处理器承载。 显示过程利用与图像相关联的参数来确定每个图像的适当显示顺序，然后基于相关参数在显示设备上相应地显示图像。 第一处理器在显示装置上进行图像的显示。 第二处理器确定图像的显示顺序。 第二处理器和第二存储器是片外的。
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公开(公告)号：US08165196B2
公开(公告)日：2012-04-24
申请号：US11536409
申请日：2006-09-28
IPC分类号： H04N7/12
摘要： A system, method, and apparatus for decoding and displaying images utilizing two processors and two memory units. The decode process receives images which are encoded according to a predetermined standard. Included with the encoded images are parameters which facilitate the decode and display processes. The decode process decodes the encoded images and the encoded parameters and stores each image in a separate image buffer, and each set of associated parameters in a buffer descriptor structure associated with the image buffer. The decode process is carried on by the first processor. The display process utilizes the parameters associated with the image to determine the appropriate display order for each image, and then display the image accordingly on a display device, based on the associated parameters. The first processor carries on the display of the image on the display device. The second processor determines the display order for the images. The second processor and the second memory are off-chip.
摘要翻译： 一种使用两个处理器和两个存储器单元解码和显示图像的系统，方法和装置。 解码处理接收根据预定标准编码的图像。 编码图像包括有助于解码和显示过程的参数。 解码过程对编码图像和编码参数进行解码，并将每个图像存储在单独的图像缓冲器中，并将每个相关参数集合在与图像缓冲器相关联的缓冲器描述符结构中。 解码过程由第一处理器承载。 显示过程利用与图像相关联的参数来确定每个图像的适当显示顺序，然后基于相关参数在显示设备上相应地显示图像。 第一处理器在显示装置上进行图像的显示。 第二处理器确定图像的显示顺序。 第二处理器和第二存储器是片外的。
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公开(公告)号：US20080080621A1
公开(公告)日：2008-04-03
申请号：US11536409
申请日：2006-09-28
IPC分类号： H04N7/12
摘要： A system, method, and apparatus for decoding and displaying images utilizing two processors and two memory units. The decode process receives images which are encoded according to a predetermined standard. Included with the encoded images are parameters which facilitate the decode and display processes. The decode process decodes the encoded images and the encoded parameters and stores each image in a separate image buffer, and each set of associated parameters in a buffer descriptor structure associated with the image buffer. The decode process is carried on by the first processor. The display process utilizes the parameters associated with the image to determine the appropriate display order for each image, and then display the image accordingly on a display device, based on the associated parameters. The first processor carries on the display of the image on the display device. The second processor determines the display order for the images. The second processor and the second memory are off-chip.
摘要翻译： 一种使用两个处理器和两个存储器单元解码和显示图像的系统，方法和装置。 解码处理接收根据预定标准编码的图像。 编码图像包括有助于解码和显示过程的参数。 解码过程对编码图像和编码参数进行解码，并将每个图像存储在单独的图像缓冲器中，并将每个相关参数集合在与图像缓冲器相关联的缓冲器描述符结构中。 解码过程由第一处理器承载。 显示过程利用与图像相关联的参数来确定每个图像的适当显示顺序，然后基于相关参数在显示设备上相应地显示图像。 第一处理器在显示装置上进行图像的显示。 第二处理器确定图像的显示顺序。 第二处理器和第二存储器是片外的。
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公开(公告)号：US20050086591A1
公开(公告)日：2005-04-21
申请号：US10607363
申请日：2003-06-26
申请人： Santosh Savekar
发明人： Santosh Savekar
IPC分类号： G06F17/24
CPC分类号： H04N19/44 , G06F17/241 , H04N21/84
摘要： Aspects of the present invention are directed to a system, method, and apparatus for annotating decompressed frames from a video sequence. In one embodiment, a data structure comprising a compressed representation of a first frame and a set of parameters is received. The first frame is decompressed and a graphic displaying at least one of the parameters is created. The graphic displaying at least one of the parameters is annotated to the decompressed first frame.
摘要翻译： 本发明的方面涉及一种用于从视频序列注释解压缩帧的系统，方法和装置。 在一个实施例中，接收包括第一帧的压缩表示和一组参数的数据结构。 解压缩第一帧，并创建显示至少一个参数的图形。 显示至少一个参数的图形被注释到解压缩的第一帧。
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公开(公告)号：US20060239359A1
公开(公告)日：2006-10-26
申请号：US11154326
申请日：2005-06-16
CPC分类号： H04N19/427 , H04N19/44
摘要： Presented herein is a system and method for pause and picture advance. In one embodiment, there is presented a method for displaying pictures. The method comprises displaying a first picture at a first vertical synchronization signal; receiving a particular input between the first vertical synchronization signal and a second vertical synchronization signal, the second vertical synchronization signal coming after the first vertical synchronization signal; displaying a second picture at the second vertical synchronization signal; and preventing overwriting of the second picture.
摘要翻译： 这里提出了一种用于暂停和图像提前的系统和方法。 在一个实施例中，提供了一种用于显示图片的方法。 该方法包括以第一垂直同步信号显示第一图像; 在所述第一垂直同步信号和第二垂直同步信号之间接收特定输入，所述第二垂直同步信号在所述第一垂直同步信号之后; 在第二垂直同步信号处显示第二图像; 并防止覆盖第二图像。
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18.发明申请Buffer descriptor structures for communication between decoder and display manager 有权用于解码器和显示管理器之间通信的缓冲区描述符结构公开(公告)号：US20050093885A1
公开(公告)日：2005-05-05
申请号：US10914808
申请日：2004-08-10
CPC分类号： H04N19/436 , H04N19/42 , H04N19/44
摘要： A system, method, and apparatus for decoding and displaying images utilizing two processors and two memory units. The decode process receives images which are encoded according to a predetermined standard. Included with the encoded images are parameters which facilitate the decode and display processes. The decode process decodes the encoded images and the encoded parameters and stores each image in a separate image buffer, and each set of associated parameters in a buffer descriptor structure associated with the image buffer. The decode process is carried on by the first processor. The display process utilizes the parameters associated with the image to determine the appropriate display order for each image, and then display the image accordingly on a display device, based on the associated parameters. The first processor carries on the display of the image on the display device. The second processor determines the display order for the images. The second processor and the second memory can be off-chip.
摘要翻译： 一种使用两个处理器和两个存储器单元解码和显示图像的系统，方法和装置。 解码处理接收根据预定标准编码的图像。 编码图像包括有助于解码和显示过程的参数。 解码过程对编码图像和编码参数进行解码，并将每个图像存储在单独的图像缓冲器中，并将每个相关参数集合在与图像缓冲器相关联的缓冲器描述符结构中。 解码过程由第一处理器承载。 显示过程利用与图像相关联的参数来确定每个图像的适当显示顺序，然后基于相关参数在显示设备上相应地显示图像。 第一处理器在显示装置上进行图像的显示。 第二处理器确定图像的显示顺序。 第二处理器和第二存储器可以是片外的。
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