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公开(公告)号：US12175328B2
公开(公告)日：2024-12-24
申请号：US17276668
申请日：2019-08-13
Applicant: Google LLC
Inventor： Craig Gidney , Ryan Babbush , Ian David Kivlichan
IPC: G06N10/00 , H03K19/195 , H03K19/20
Abstract: Methods, systems and apparatus for determining properties of a physical system described by an electronic structure Hamiltonian. In one aspect, a Hamiltonian describing the physical system is transformed into a qubit Hamiltonian describing a corresponding system of qubits. The qubit Hamiltonian comprises multiple two-qubit interaction terms, each comprising a respective translation invariant coefficient. The system of qubits is evolved under a unitary operator generated by the multiple two-qubit interaction terms. The evolution includes applying layers of quantum logic gates to the system of qubits, wherein each application of a layer evolves the system of qubits under a unitary operator generated by a respective subset of the multiple two-qubit interaction terms and wherein the value of the coefficients of the subset of the multiple two-qubit interaction terms that generate the unitary operator is constant. The evolved system of qubits is measured and properties of the physical system is determined.
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公开(公告)号：US20240338582A1
公开(公告)日：2024-10-10
申请号：US18745923
申请日：2024-06-17
Applicant: Google LLC
Inventor： Craig Gidney
CPC classification number: G06N10/00 , G06F7/4824 , G06F7/505 , G06F7/5057 , G06F7/72 , G06F17/10 , G11C11/4063 , H04B10/70
Abstract: Methods and apparatus for piecewise addition into an accumulation register using one or more carry runway registers, where the accumulation register includes a first plurality of qubits with each qubit representing a respective bit of a first binary number and where each carry runway register includes multiple qubits representing a respective binary number. In one aspect, a method includes inserting the one or more carry runway registers into the accumulation register at respective predetermined qubit positions, respectively, of the accumulation register; initializing each qubit of each carry runway register in a plus state; applying one or more subtraction operations to the accumulation register, where each subtraction operation subtracts a state of a respective carry runway register from a corresponding portion of the accumulation register; and adding one or more input binary numbers into the accumulation register using piecewise addition.
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公开(公告)号：US11941488B2
公开(公告)日：2024-03-26
申请号：US18181419
申请日：2023-03-09
Applicant: Google LLC
Inventor： Craig Gidney
Abstract: Methods, systems, and apparatus for performing phase operations. In one aspect, a method for performing a same phase operation on a first and second qubit using a third qubit prepared in a phased plus state includes: performing a first NOT operation on the third qubit; computing a controlled adder operation on the first, second and third qubit, comprising encoding the result of the controlled adder operation in a fourth qubit; performing a square of the phase operation on the fourth qubit; uncomputing the controlled adder operation on the first, second and third qubit; performing a CNOT operation between the first qubit and the third qubit, wherein the first qubit acts as the control; performing a CNOT operation between the second qubit and the third qubit, wherein the second qubit acts as the control; and performing a second NOT operation on the third qubit.
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公开(公告)号：US11909392B2
公开(公告)日：2024-02-20
申请号：US17296909
申请日：2019-11-27
Applicant: Google LLC
Inventor： Craig Gidney , Austin Greig Fowler
IPC: H03K19/003 , G06N10/00 , G06F8/20 , H03M13/00 , H03M13/29 , G06F11/00 , H03M13/03 , G06F111/10
CPC classification number: H03K19/003 , G06F8/20 , G06F11/004 , G06N10/00 , H03M13/033 , H03M13/2909 , H03M13/611 , G06F2111/10 , G06F2201/82
Abstract: Methods, systems, and apparatus for producing CCZ states and T states. In one aspect, a method for distilling a CCZ state includes preparing multiple target qubits, ancilla qubits and stabilizer qubits in a zero state, performing an X gate for each stabilizer qubit on multiple ancilla qubits or multiple ancilla qubits and one of the target qubits using the stabilizer qubit as a control, measuring the stabilizer qubits, performing, on each of the ancilla qubits, a Z1/4 gate and a Hadamard gate, measuring each of the ancilla qubits, performing, conditioned on each measured ancilla qubit state, a NOT operation on a selected stabilizer qubit, or a NOT operation on the selected stabilizer qubit and a Z gate on one or more respective target qubits, performing, on each target qubit and conditioned on a measured state of a respective stabilizer qubit, a Z gate on the target qubit, and performing an X gate on each of the target qubits.
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公开(公告)号：US11531923B2
公开(公告)日：2022-12-20
申请号：US17332723
申请日：2021-05-27
Applicant: Google LLC
Inventor： Craig Gidney
Abstract: Methods and apparatus for optimizing a quantum circuit. In one aspect, a method includes identifying one or more sequences of operations in the quantum circuit that un-compute respective qubits on which the quantum circuit operates; generating an adjusted quantum circuit, comprising, for each identified sequence of operations in the quantum circuit, replacing the sequence of operations with an X basis measurement and a classically-controlled phase correction operation, wherein a result of the X basis measurement acts as a control for the classically-controlled correction phase operation; and executing the adjusted quantum circuit.
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Patent Agency Ranking
公开(公告)号：US20210312315A1
公开(公告)日：2021-10-07
申请号：US17353411
申请日：2021-06-21
Applicant: GOOGLE LLC
Inventor： Craig Gidney
IPC: G06N10/00 , H03K19/195 , H03K19/20
Abstract: Methods, systems and apparatus for producing quantum circuits with low T gate counts. In one aspect, a method for performing a temporary logical AND operation on two control qubits includes the actions of obtaining an ancilla qubit in an A-state; computing a logical-AND of the two control qubits and storing the computed logical-AND in the state of the ancilla qubit, comprising replacing the A-state of the ancilla qubit with the logical-AND of the two control qubits; maintaining the ancilla qubit storing the logical-AND of the two controls until a first condition is satisfied; and erasing the ancilla qubit when the first condition is satisfied.
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公开(公告)号：US20250005423A1
公开(公告)日：2025-01-02
申请号：US18444147
申请日：2024-02-16
Applicant: Google LLC
Inventor： Craig Gidney
Abstract: Methods, systems, and apparatus for encoding a magic state in a surface code patch of physical qubits with a target distance. In one aspect, a method includes performing a first surface code cycle on a surface code patch of physical qubits with an initial distance to encode the magic state into the surface code patch. Performing the first surface code cycle introduces a hook error associated with a four-body stabilizer on a qubit included in the surface code patch, where the hook error rotates a logical observable of the surface code patch. Further, performing the first surface code cycle includes initializing the qubit in the magic state. One or more rounds of error detection are performed on the surface code patch that encodes the magic state. The surface code patch is expanded to the target distance based on results of the one or more rounds of error detection.
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公开(公告)号：US20240127103A1
公开(公告)日：2024-04-18
申请号：US18532394
申请日：2023-12-07
Applicant: Google LLC
Inventor： Craig Gidney , Austin Greig Fowler
IPC: G06N10/70 , G06F8/20 , G06F11/00 , G06N10/20 , G06N10/40 , H03K19/003 , H03M13/00 , H03M13/03 , H03M13/29
CPC classification number: G06N10/70 , G06F8/20 , G06F11/004 , G06N10/20 , G06N10/40 , H03K19/003 , H03M13/033 , H03M13/2909 , H03M13/611 , G06F2111/10 , G06F2201/82
Abstract: Methods, systems, and apparatus for producing CCZ states and T states. In one aspect, a method for transforming a CCZ state into three T states includes obtaining a first target qubit, a second target qubit and a third target qubit in a CCZ state; performing a X−1/2 gate on the third target qubit; performing an X gate on the first target qubit and the second target qubit using the third target qubit as a control; performing a Z gate on the first target qubit and the second target qubit using the third qubit as a X axis control; performing a Z−1/4 gate on the third target qubit; and performing a Z gate on the first target qubit and the second target qubit using the third qubit as a X axis control to obtain the three T states.
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公开(公告)号：US20230394019A1
公开(公告)日：2023-12-07
申请号：US18311733
申请日：2023-05-03
Applicant: Google LLC
Inventor： Craig Gidney , Ryan Babbush
CPC classification number: G06F16/2228 , G06N10/00
Abstract: Methods, systems and apparatus for performing indexed operations using a unary iteration quantum circuit. In one aspect, a method includes encoding an index value in an index register comprising index qubits; encoding the index value in a control register comprising multiple control qubits; and repeatedly computing and uncomputing the control qubits to perform, conditioned on the state of the control qubits, the operation on one or more target qubits corresponding to the index value, wherein during the encoding, computing and uncomputing: the multiple control qubits are made available in sequence, and the multiple control qubits correspond to a one-hot encoding of the encoded index value.
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公开(公告)号：US20230134407A1
公开(公告)日：2023-05-04
申请号：US18090834
申请日：2022-12-29
Applicant: GOOGLE LLC
Inventor： Craig Gidney
IPC: G06N10/00 , H03K19/195 , H03K19/20
Abstract: Methods, systems and apparatus for producing quantum circuits with low T gate counts. In one aspect, a method for performing a temporary logical AND operation on two control qubits includes the actions of obtaining an ancilla qubit in an A-state; computing a logical-AND of the two control qubits and storing the computed logical-AND in the state of the ancilla qubit, comprising replacing the A-state of the ancilla qubit with the logical-AND of the two control qubits; maintaining the ancilla qubit storing the logical-AND of the two controls until a first condition is satisfied; and erasing the ancilla qubit when the first condition is satisfied.
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