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公开(公告)号：US20210223639A1
公开(公告)日：2021-07-22
申请号：US16632161
申请日：2019-05-29
Inventor： Chunxu ZHANG , Yuntian ZHANG , Zhonghou WU , Peng JIANG , Yafei DENG , Ke DAI
IPC: G02F1/1362 , G02F1/1368 , H01L27/02 , H01L27/12 , H01L29/786
Abstract: An array substrate is disclosed, the array sul cluding: a pixel display transistor having a first source, a first drain, and a first channel region, the first channel region having a first channel length extending between the first source and the first drain; an antistatic transistor having a second source, a second drain, and a second channel region; and a conductive block in the second channel region between the second source and the second drain; wherein the first channel region and second channel region are patterned regions of a same semiconductor material layer; and the conductive block divides the second channel region into a first sub-channel and a second sub-channel.
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公开(公告)号：US20210150962A1
公开(公告)日：2021-05-20
申请号：US17094737
申请日：2020-11-10
Inventor： Qing LI , Liugang ZHOU , Ke DAI , Yizhan HAN , Liu HE , Yunyun LIANG , Jun WANG , Zhenlin QU , Jianwei SUN , Yulong XIONG , Tao LI , Yu QUAN , Xiaofeng YIN , Qian ZHOU , Pengjun FANG
IPC: G09G3/20
Abstract: A display driving device, a display driving method, a display module and a display device are provided. The display driving device includes: a PWM signal generating circuit configured to generate a PWM signal; a PWM signal acquisition circuit, configured to identify whether the PWM signal output by the PWM signal generating circuit is at a high level or a low level; a gamma voltage debugging circuit, configured to debug a gamma voltage to obtain a first group of gamma voltage reference data corresponding to the PWM signal at the high level and a second group of gamma voltage reference data corresponding to the PWM signal at the low level in each gray-scale image; and a gamma voltage switching circuit.
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13.发明申请公开(公告)号：US20210051780A1
公开(公告)日：2021-02-18
申请号：US16990768
申请日：2020-08-11
Inventor： Jianwei SUN , Liugang ZHOU , Ke DAI , Yizhan HAN , Yulong XIONG , Tao LI , Xiaofeng YIN , Maoyang ZHU , Pengjun FANG
IPC: H05B45/325 , G02F1/1362 , G02F1/1345
Abstract: A source driver includes at least one data input terminal, a plurality of data output terminals, at least two control terminals and a plurality of source driving circuits. Each source driving circuit is connected to a data input terminal of the at least one data input terminal, a data output terminal of the plurality of data output terminals and the at least two control terminals. The source driving circuit is configured such that: the source driving circuit converts a format of a data signal from the data input terminal; and in response to one of different control signals that is received by all the at least two control terminals, the source driving circuit has a corresponding different output impedance, and transmits the converted data signal to the data output terminal.
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公开(公告)号：US20200273390A1
公开(公告)日：2020-08-27
申请号：US16527560
申请日：2019-07-31
Inventor： Ke DAI , Tao LI , Liugang ZHOU
IPC: G09G3/20
Abstract: A control circuit board, an additional circuit board and a display device. The control circuit board includes a timing control circuit, the timing control circuit is configured to read a configuration code from a storage circuit on an additional circuit board outside the control circuit board, the configuration code includes a first code for configuring the timing control circuit, and the timing control circuit is further configured to generate, based on the first code, a control signal for controlling the display panel.
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公开(公告)号：US20240274084A1
公开(公告)日：2024-08-15
申请号：US18022757
申请日：2022-04-21
Inventor： Chunxu ZHANG , Ke DAI , Jiantao LIU , Lei GUO , Maoxiu ZHOU , Xiaoting JIANG , Min CHENG , Qi LIU
IPC: G09G3/3266 , G09G3/36
CPC classification number: G09G3/3266 , G09G3/3677 , G09G2300/0426 , G09G2320/0233
Abstract: A display panel, including: a substrate including a display region and a non-display region; a second conductive layer including more than one gate line located in the display region, and more than one virtual gate line located in the non-display region; a virtual conductive part, located in the non-display region, where the virtual conductive part is located in a different conductive layer from the virtual gate line, an orthographic projection of the virtual conductive part on the substrate is located within an orthographic projection of the virtual gate line on the substrate, and the virtual conductive part is configured to form an equivalent capacitance with the virtual gate line; and a RC load of the virtual gate line matches with a RC load of the gate line.
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Patent Agency Ranking
公开(公告)号：US20240248352A1
公开(公告)日：2024-07-25
申请号：US18016278
申请日：2022-02-28
Inventor： Ke DAI , Ruilian LI , Chunyang NIE
IPC: G02F1/1345
CPC classification number: G02F1/13452
Abstract: The disclosure provides a circuit board, a display substrate and a display apparatus, where the circuit board includes an input side and an output side oppositely arranged, and the output side is configured to electrically connected to a display substrate; the circuit board includes a plurality of signal lines extending in a direction from the input side to the output side, each of the signal lines includes a main body and a plurality of output branches, each of the output branches is connected to one end of the main body close to the output side and has a same line width, and a line width of the main body is greater than a sum of line widths of all the output branches.
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17.发明申请公开(公告)号：US20220415280A1
公开(公告)日：2022-12-29
申请号：US17778125
申请日：2021-05-11
Inventor： Yunyun LIANG , Liugang ZHOU , Ke DAI , Liu HE , Jianwei SUN , Jun WANG , Qing LI , Yu QUAN
IPC: G09G3/36
Abstract: There is provided a voltage supply circuit, in which a signal output end of a power management integrated circuit, a signal input end of a transmission branch, and a signal input end of a voltage reduction branch are coupled to a first node; a signal output end of transmission branch and a signal output end of the voltage reduction branch are coupled to a second node; the power management integrated circuit supplies an initial voltage to the first node; the transmission branch is coupled to a control signal terminal, and switch between a conducting state and a cutoff state in response to control of a control signal, and write the initial voltage into the second node in the conducting state; and the voltage reduction branch performs voltage reduction on the initial voltage at the first node to obtain a reduced voltage to be written into the second node.
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公开(公告)号：US20220308412A1
公开(公告)日：2022-09-29
申请号：US17299678
申请日：2020-09-17
Inventor： Chunxu ZHANG , Ke DAI , Haipeng YANG , Yuntian ZHANG , Xiaoting JIANG , Min CHENG
IPC: G02F1/1362 , G02F1/1368
Abstract: There is provided a display substrate, including gate lines and data lines, which define pixel units, each pixel unit includes a pixel electrode, at least some pixel units are provided with a conductive bridge line in a same layer as the pixel electrode; in the pixel unit with the conductive bridge line, a first hollow structure is on a first side of a first or second end part of the pixel electrode, an end of the conductive bridge line is in the first hollow structure, a second hollow structure is on a second side of the first end part, an absolute value of a difference between parasitic capacitances respectively formed between the pixel electrode and the data lines on two sides of the pixel electrode and closest thereto is less than or equal to a preset capacitance difference value. A display panel and a display device are further provided.
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公开(公告)号：US20220293539A1
公开(公告)日：2022-09-15
申请号：US17507655
申请日：2021-10-21
Inventor： Chunxu ZHANG , Xiaoting JIANG , Min CHENG , Maoxiu ZHOU , Haipeng YANG , Ke DAI
IPC: H01L23/00
Abstract: Provided is an array substrate. The array substrate includes at least one pad group disposed in a peripheral region of a base substrate, wherein the at least one pad group includes a sector pad group in which the pads are distributed in a sector shape. Therefore, the bonding yield between the array substrate and the circuit board is increased.
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公开(公告)号：US20220291541A1
公开(公告)日：2022-09-15
申请号：US17530065
申请日：2021-11-18
Inventor： Min CHENG , Ke DAI , Haipeng YANG , Maoxiu ZHOU , Xiaoting JIANG , Chunxu ZHANG
IPC: G02F1/1335 , G02F1/1333
Abstract: Disclose are a display substrate, a liquid crystal display panel and a display device. The display substrate is provided with a display region. The display substrate includes: a base substrate, and a black matrix arranged on a side of the base substrate. The black matrix includes: a first region corresponding to the display region, and a plurality of frame regions arranged on a periphery of the first region. At least one rectilinear first slit and at least one rectilinear second slit intersecting with the at least one rectilinear first slit are arranged in the at least one of the frame regions, and an extending direction of the at least one rectilinear first slit is same as an extending direction of the at least one of the frame regions.
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