-
1.
公开(公告)号:US20240079501A1
公开(公告)日:2024-03-07
申请号:US18261348
申请日:2021-10-22
发明人: Qi LIU , Jiantao LIU , Jianbo XIAN , Wei ZHANG , Jincheng GAO , Liangliang JIANG
IPC分类号: H01L29/786 , H01L29/423 , H01L29/66
CPC分类号: H01L29/78696 , H01L29/42364 , H01L29/42384 , H01L29/6675 , H01L29/78663
摘要: A thin film transistor and a manufacturing method therefor, an array substrate, and a display panel and device. The thin film transistor includes: a gate (11) and an active layer (12) that are located on one side of a base substrate (10); a gate insulation layer (13) located between the gate (11) and the active layer (12); and a source (14) and a drain (15) that are spaced apart and both are in contact with the active layer (12), wherein a first ratio of the thickness of the gate insulation layer (13) and the thickness of the active layer (12) ranges from 3 to 4.
-
2.
公开(公告)号:US20220301491A1
公开(公告)日:2022-09-22
申请号:US17498411
申请日:2021-10-11
发明人: Tianxun XIU , Changcheng LIU , Yanping LIAO , Yinlong ZHANG , Ming DENG , Guohuo SU , Jiantao LIU
IPC分类号: G09G3/32
摘要: The disclosure discloses a timing controller board, a main control board, a display device and a detection method thereof. The timing controller board outputs a second level signal transmitted by a first fixed potential signal pin to the main control board through a detection circuit when a first data signal pin outputs a first level signal; the main control board loads a second potential signal transmitted by a second fixed potential signal pin to a second data signal pin and a clock signal pin through a switching circuit upon receiving the second level signal, to cause the main control board to stop sending a data signal to the timing controller board through the second data signal pin and stop sending a clock signal to the timing controller board through the clock signal pin.
-
公开(公告)号:US20240249658A1
公开(公告)日:2024-07-25
申请号:US18016284
申请日:2022-02-24
发明人: Liugang ZHOU , Jinshui CHEN , Jianwei SUN , Zhihua SUN , Wu WANG , Jun WANG , Jiao LIU , Jie DENG , Jiantao LIU
IPC分类号: G09G3/20 , G09G3/3291 , G09G3/36
CPC分类号: G09G3/2074 , G09G3/2003 , G09G3/3291 , G09G3/3607 , G09G3/3688 , G09G2300/0452 , G09G2310/08 , G09G2320/0233 , G09G2320/0242 , G09G2320/0285
摘要: Provided are a method for driving a display panel, and a display device. The method includes: obtaining a gray scale value of each sub-pixels in a current row and a gray scale value of each sub-pixels in a previous row; determining a target gray scale value of each sub-pixel in the current row according to the gray scale value of each sub-pixel in the current row, the gray scale value of each sub-pixel in the previous row, and a target compensation value in a predetermined target compensation lookup table; and inputting a data voltage into a data line in the display panel according to the target gray scale value of each sub-pixel in the current row, to charge with a corresponding data voltage to each sub-pixel in the current row.
-
公开(公告)号:US20240249659A1
公开(公告)日:2024-07-25
申请号:US18016414
申请日:2022-02-28
发明人: Jianwei SUN , Liugang ZHOU , Jiao LIU , Jiantao LIU , Jun WANG , Yunyun LIANG , Qing LI
IPC分类号: G09G3/20
CPC分类号: G09G3/2074 , G09G2300/0819 , G09G2310/08 , G09G2320/0285 , G09G2320/0626
摘要: A method and a circuit for driving a display panel, and a display device are disclosed. The display panel includes rows of sub-pixels. The method includes a display process, which includes: generating an initial driving signal for each row of sub-pixels according to image information of an image to be displayed; adjusting the initial driving signal for each row of sub-pixels according to a compensation gain of each row of sub-pixels, so as to obtain a target driving signal, the compensation gain of each row of sub-pixels is an actual brightness coefficient of the row of sub-pixels with respect to a reference row of sub-pixels during the display panel displaying an image with a test gray scale; and driving each row of sub-pixels to display according to the target driving signal for the row of sub-pixels, so as to enable each row of sub-pixels to reach target brightness.
-
5.
公开(公告)号:US20240135892A1
公开(公告)日:2024-04-25
申请号:US17769632
申请日:2021-03-03
发明人: Yunlu CHEN , Changcheng LIU , Liugang ZHOU , Liu HE , Kun YANG , Jianwei SUN , Jun WANG , Yunyun LIANG , Qing LI , Yu QUAN , Yanting HUANG , Zhengru PAN , Bingbing YAN , Jiantao LIU
CPC分类号: G09G3/36 , G09G3/2096 , G09G2320/02 , G09G2320/041 , G09G2370/00
摘要: Disclosed are a method for adjusting a signal of a display panel, a time controller integrated circuit, a display panel, and a storage medium. The method includes: converting first data into a first data voltage signal using a first data voltage, in response to a set condition being reached, sending the first data voltage signal to a chip on film integrated circuit, the chip on film integrated circuit identifies the first data voltage signal to obtain a second data; acquiring the second data from the chip on film integrated circuit, determining that the chip on film integrated circuit fails to identify the first data in response to the second data being different from the first data; and adjusting the first data voltage until a second data voltage signal converted from the first data using a second data voltage after adjustment being successfully identified by the chip on film integrated circuit.
-
公开(公告)号:US20240347016A1
公开(公告)日:2024-10-17
申请号:US18579433
申请日:2023-01-03
发明人: Qing LI , Panhui ZHAO , Liugang ZHOU , Ke DAI , Jun WANG , Jianwei SUN , Yunyun LIANG , Yanting HUANG , Yu QUAN , Yunlu CHEN , Zhengru PAN , Jiantao LIU
IPC分类号: G09G3/36
CPC分类号: G09G3/3607 , G09G3/3688 , G09G2310/08 , G09G2320/0257 , G09G2320/0271
摘要: A method for driving a display panel and a display device, the method includes: acquiring an original grayscale value of each sub-pixel in an mth row and a target grayscale value corresponding to a data voltage input to each sub-pixel in an (m−1)th row m being an integer greater than 1; if, in a same column, the original grayscale value of the sub-pixel in the mth row is larger than the target grayscale value corresponding to the data voltage input to the sub-pixel in the (m−1)th row, determining a target grayscale value of each sub-pixel in the mth row according to the original grayscale value of the sub-pixel in the mth row and the target grayscale value of the sub-pixel in the (m−1)th row inputting a data voltage to a data line in the display panel according to the target grayscale value of each sub-pixel in the mth row.
-
公开(公告)号:US20220302180A1
公开(公告)日:2022-09-22
申请号:US17514265
申请日:2021-10-29
发明人: Liang CHEN , Jincheng GAO , Haijiao QIAN , Tao JIANG , Zexu LIU , Tao WANG , Lixing ZHAO , Guanyong ZHANG , Quanzhou LIU , Jiantao LIU
IPC分类号: H01L27/12 , H01L21/311
摘要: Embodiments of the disclosure provide a display substrate and a method for manufacturing the same. The display substrate includes: a base substrate; a thin film transistor including a source-drain metal layer and a first insulating layer; a second insulating layer; a color resist layer; and a third insulating layer. The third insulating layer comprises a first via hole that sequentially penetrates the third insulating layer, the color resist layer and the second insulating layer and thus extends from the third insulating layer to the source-drain metal layer. A sidewall of the first via hole comprises a first portion formed of a material of the second insulating layer, a second portion formed of a material of the color resist layer, and a third portion formed of a material of the third insulating layer, the second portion is between the first portion and the third portion.
-
公开(公告)号:US20240298403A1
公开(公告)日:2024-09-05
申请号:US18560671
申请日:2021-05-13
发明人: Yunyun LIANG , Changcheng LIU , Jiantao LIU , Liugang ZHOU , Jianwei SUN , Liu HE , Jun WANG , Qing LI , Yu QUAN , Yanting HUANG , Yunlu CHEN , Zhengru PAN
CPC分类号: H05K1/0269 , H05K1/189 , H05K2201/10128 , H05K2201/10318
摘要: The present disclosure provides a circuit board, a chip on film, a display apparatus and a bonding method. The circuit board has a plurality of bonding regions for bonding with a chip on film, each bonding region includes: a plurality of first pins extending along a first direction and sequentially arranged along a second direction; and at least one first alignment mark group on an arrangement path along which the plurality of first pins are arranged and configured to be aligned with a second alignment mark group of the chip on film in a buckled way, so that the plurality of first pins are bonded and attached to second pins of the chip on film in one-to-one correspondence.
-
公开(公告)号:US20240274084A1
公开(公告)日:2024-08-15
申请号:US18022757
申请日:2022-04-21
发明人: Chunxu ZHANG , Ke DAI , Jiantao LIU , Lei GUO , Maoxiu ZHOU , Xiaoting JIANG , Min CHENG , Qi LIU
IPC分类号: G09G3/3266 , G09G3/36
CPC分类号: G09G3/3266 , G09G3/3677 , G09G2300/0426 , G09G2320/0233
摘要: A display panel, including: a substrate including a display region and a non-display region; a second conductive layer including more than one gate line located in the display region, and more than one virtual gate line located in the non-display region; a virtual conductive part, located in the non-display region, where the virtual conductive part is located in a different conductive layer from the virtual gate line, an orthographic projection of the virtual conductive part on the substrate is located within an orthographic projection of the virtual gate line on the substrate, and the virtual conductive part is configured to form an equivalent capacitance with the virtual gate line; and a RC load of the virtual gate line matches with a RC load of the gate line.
-
10.
公开(公告)号:US20240233663A9
公开(公告)日:2024-07-11
申请号:US17769632
申请日:2021-03-03
发明人: Yunlu CHEN , Changcheng LIU , Liugang ZHOU , Liu HE , Kun YANG , Jianwei SUN , Jun WANG , Yunyun LIANG , Qing LI , Yu QUAN , Yanting HUANG , Zhengru PAN , Bingbing YAN , Jiantao LIU
CPC分类号: G09G3/36 , G09G3/2096 , G09G2320/02 , G09G2320/041 , G09G2370/00
摘要: Disclosed are a method for adjusting a signal of a display panel, a time controller integrated circuit, a display panel, and a storage medium. The method includes: converting first data into a first data voltage signal using a first data voltage, in response to a set condition being reached, sending the first data voltage signal to a chip on film integrated circuit, the chip on film integrated circuit identifies the first data voltage signal to obtain a second data; acquiring the second data from the chip on film integrated circuit, determining that the chip on film integrated circuit fails to identify the first data in response to the second data being different from the first data; and adjusting the first data voltage until a second data voltage signal converted from the first data using a second data voltage after adjustment being successfully identified by the chip on film integrated circuit.
-
-
-
-
-
-
-
-
-