公开(公告)号：US3634665A

公开(公告)日：1972-01-11

申请号：US3634665D

申请日：1969-06-30

Applicant: IBM

Inventor： CARTER WILLIAM C ,  SCHNEIDER PETER R

IPC: H03M13/00 ,  G06F11/16 ,  G06F11/20 ,  G06F11/22 ,  G06F15/16

CPC classification number: G01R31/31835 ,  G01R31/3187 ,  G06F11/1032

Abstract: A self-testing error-checking system for inclusion in a computer comprising a plurality of self-testing check circuits, each said circuit having a two-rail complementary output whenever both the circuits being tested and the checking circuit is operating properly and an identical output on each of the two output lines whenever a fault is detected. The improvement which comprises reduction checking means connected to all said two-rail outputs from said checking circuits, and means connected to the output of said reduction checker means for at least indicating that a failure has occurred. The output of said reduction checker itself is two rail and complementary when all inputs are correct and the checker itself is operating properly. The output of the present checking system may be connected to a computer interrupt circuit or to a visual logout means. Alternatively, the system output may be utilized to effect automatic self-repair.

Abstract translation: 一种用于包含在包括多个自测试检查电路的计算机中的自检错误检查系统，每当所述两个电路被测试且检查电路正常工作并且相同的输出时，每个所述电路具有双轨互补输出 每当检测到故障时，在两条输出线中的每一条上。 所述改进包括从所述检查电路连接到所有所述两轨输出的减小检查装置，以及连接到所述缩小检查装置的输出的装置，用于至少指示发生故障。 当所有输入正确并且检验器本身正常运行时，所述还原检查器本身的输出是两个轨道和互补的。 本检查系统的输出可以连接到计算机中断电路或视觉注销装置。 或者，可以利用系统输出来实现自动自修复。

公开(公告)号：US3559168A

公开(公告)日：1971-01-26

申请号：US3559168D

申请日：1968-07-25

Applicant: IBM

Inventor： CARTER WILLIAM C ,  DUKE KEITH A ,  SCHNEIDER PETER R

IPC: G06F11/08 ,  H03K13/32 ,  G08C25/00

CPC classification number: G06F11/085

Abstract: A SERIES OF SELF-CHECKING ERROR CHECKING CIRCUITS ARE DISCLOSED FOR CHECKING K-OUT-OF-N CODED DATA LINES. THE N LINES ARE BROKEN INTO TWO, PREFERABLY EQUAL, GROUPS. A LOGIC EQUATION IS DERIVED FOR EACH GROUP OF LINES WHEREBY, WITH ANY K-OUT-OF-N CODED DATA SIGNALS APPLIED TO THE INPUT, AT LEAST TWO COMPLEMENTARY OUTPUT SIGNALS ARE PRODUCED. ANY ERROR APPEARING IN THE RECEIVED CODE WILL BE INDICATED AS SUCH BY NON-COMPLEMENTARY OUTPUTS FROM

THE CHECKER IN THE OUTPUT OF THE CHECKER. MALFUNCTIONS OR FAILURES IN THE CHECKING CIRCUIT ARE CHECKED BY CERTAIN LEGITIMATE CODE SIGNALS WHICH SIMILARLY CAUSE AN ERROR REPRESENTATION IN NON-COMPLEMENTARY OUTPUTS AT THE OUTPUT OF THE CHECKER.