公开(公告)号：US10001611B2

公开(公告)日：2018-06-19

申请号：US15061941

申请日：2016-03-04

Applicant: INPHI CORPORATION

Inventor： Liang Ding ,  Radhakrishnan L. Nagarajan ,  Roberto Coccioli

IPC: G02B6/42 ,  G02B6/13 ,  G02B6/30 ,  H01L21/56 ,  H01L21/768 ,  H01L23/00 ,  H01L25/16 ,  G02B6/12

Abstract: An optical transceiver by hybrid multichip integration. The optical transceiver includes a PCB with a plurality of prefabricated surface bonding sites. A first chip includes a FOWLP package of multiple electronics devices embedded in a dielectric molding layer overlying a dielectric redistribution layer is disposed on the PCB by respectively bonding a plurality of conductor balls between the dielectric redistribution layer and the plurality of prefabricated surface bonding sites while exposing soldering material filled in multiple through-mold vias (TMVs) in the dielectric molding layer. The optical transceiver further includes a second chip configured as a Sipho die comprising photonics devices embedded in a SOI wafer substantially free from any electronics device process. The second chip is stacked over the first chip with multiple conductor bumps being bonded respectively to the soldering material in the multiple TMVs.

公开(公告)号：US10566287B1

公开(公告)日：2020-02-18

申请号：US15887758

申请日：2018-02-02

Applicant: INPHI CORPORATION

Inventor： Liang Ding ,  Radhakrishnan L. Nagarajan

IPC: H01L21/768 ,  H01L23/538 ,  G02B6/42 ,  H01L25/16 ,  H01L23/00 ,  G02B6/12

Abstract: A method for forming a silicon photonics interposer having through-silicon vias (TSVs). The method includes forming vias in a front side of a silicon substrate and defining primary structures for forming optical devices in the front side. Additionally, the method includes bonding a first handle wafer to the front side and thinning down the silicon substrate from the back side and forming bumps at the back side to couple with a conductive material in the vias. Furthermore, the method includes bonding a second handle wafer to the back side and debonding the first handle wafer from the front side to form secondary structures based on the primary structures. Moreover, the method includes forming pads at the front side to couple with the bumps at the back side before completing final structures based on the secondary structures and debonding the second handle wafer from the back side.

公开(公告)号：US09885831B2

公开(公告)日：2018-02-06

申请号：US15586179

申请日：2017-05-03

Applicant: INPHI CORPORATION

Inventor： Liang Ding ,  Radhakrishnan L. Nagarajan

IPC: H01L21/76 ,  G02B6/132 ,  G02B6/125 ,  G02B6/136 ,  G02B6/12

CPC classification number: G02B6/132 ,  G02B6/122 ,  G02B6/125 ,  G02B6/136 ,  G02B2006/12061

Abstract: An silicon photonics device of hybrid waveguides having a coupling interlayer with an accurately controlled thickness and a method of making the same. The device includes a first plurality of Si waveguides formed in a SOI substrate and a first layer of SiO2 overlying the first plurality of Si waveguides and a second plurality of Si3N4 waveguides formed on the first layer of SiO2. At least one Si3N4 waveguide is disposed partially overlapping with at least one of the first plurality Si waveguides in vertical direction separated by the first layer of SiO2 with a thickness controlled no greater than 90 nm. The device includes a second layer of SiO2 overlying the second plurality of Si3N4 waveguides. The method of accurately controlling the coupling interlayer SiO2 thickness includes a multilayer SiO2/Si3N4/SiO2 hard mask process for SiO2 etching and polishing as stopping and buffering layer as well as Si waveguide etching mask.