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公开(公告)号:US11663449B2
公开(公告)日:2023-05-30
申请号:US16648169
申请日:2017-12-15
Applicant: Intel Corporation
Inventor: Arnab Paul , Narayan Srinivasa
Abstract: Techniques and mechanisms for providing a logical state machine with a spiking neural network which includes multiple sets of nodes. Each of the multiple sets of nodes is to implement a different respective state, and each of the multiple spike trains is provided to respective nodes of each of the multiple sets of nodes. A given state of the logical state machine is implemented by configuring respective activation modes of each node of the corresponding set of nodes. The activation mode of a given node enables that node to signal, responsive to its corresponding spike train, that a respective state transition of the logical state machine is to be performed. In another embodiment, the multiple spike trains each represent a different respective character in a system used by data evaluated with the spiking neural network.
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12.
公开(公告)号:US11544564B2
公开(公告)日:2023-01-03
申请号:US16957056
申请日:2018-02-23
Applicant: Intel Corporation
Inventor: Arnab Paul , Narayan Srinivasa
Abstract: Techniques and mechanisms for performing a Bayesian inference with a spiking neural network. In an embodiment, a parent node of the spiking neural network receives a first bias signal which is periodic. The parent node communicates a likelihood signal to a child node, wherein the parent node and the child node correspond to a first condition and a second condition, respectively. Based on a phase change which is applied to the first bias signal, the likelihood signal indicates a probability of the first condition. The child node also receives a signal which indicates an instance of the second condition. Based on the indication and a second bias signal, the child node signals to the first node that an adjustment is to be made to the phase change applied to the first bias signal. After the adjustment, the likelihood signal indicates an updated probability of the first condition.
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公开(公告)号:US20220108093A1
公开(公告)日:2022-04-07
申请号:US17554255
申请日:2021-12-17
Applicant: Intel Corporation
Inventor: Gautham Chinya , Shihao Ji , Arnab Paul
Abstract: Systems, apparatuses and methods may provide for replacing floating point matrix multiplication operations with an approximation algorithm or computation in applications that involve sparse codes and neural networks. The system may replace floating point matrix multiplication operations in sparse code applications and neural network applications with an approximation computation that applies an equivalent number of addition and/or subtraction operations.
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公开(公告)号:US20210027029A1
公开(公告)日:2021-01-28
申请号:US17067979
申请日:2020-10-12
Applicant: Intel Corporation
Inventor: Gautham Chinya , Shihao Ji , Arnab Paul
Abstract: Systems, apparatuses and methods may provide for replacing floating point matrix multiplication operations with an approximation algorithm or computation in applications that involve sparse codes and neural networks. The system may replace floating point matrix multiplication operations in sparse code applications and neural network applications with an approximation computation that applies an equivalent number of addition and/or subtraction operations.
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15.
公开(公告)号:US20200342321A1
公开(公告)日:2020-10-29
申请号:US16957056
申请日:2018-02-23
Applicant: Intel Corporation
Inventor: Arnab Paul , Narayan Srinivasa
Abstract: Techniques and mechanisms for performing a Bayesian inference with a spiking neural network. In an embodiment, a parent node of the spiking neural network receives a first bias signal which is periodic. The parent node communicates a likelihood signal to a child node, wherein the parent node and the child node correspond to a first condition and a second condition, respectively. Based on a phase change which is applied to the first bias signal, the likelihood signal indicates a probability of the first condition. The child node also receives a signal which indicates an instance of the second condition. Based on the indication and a second bias signal, the child node signals to the first node that an adjustment is to be made to the phase change applied to the first bias signal. After the adjustment, the likelihood signal indicates an updated probability of the first condition.
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公开(公告)号:US20200265290A1
公开(公告)日:2020-08-20
申请号:US16648169
申请日:2017-12-15
Applicant: Intel Corporation
Inventor: Arnab Paul , Narayan Srinivasa
Abstract: Techniques and mechanisms for providing a logical state machine with a spiking neural network which includes multiple sets of nodes. Each of the multiple sets of nodes is to implement a different respective state, and each of the multiple spike trains is provided to respective nodes of each of the multiple sets of nodes. A given state of the logical state machine is implemented by configuring respective activation modes of each node of the corresponding set of nodes. The activation mode of a given node enables that node to signal, responsive to its corresponding spike train, that a respective state transition of the logical state machine is to be performed. In another embodiment, the multiple spike trains each represent a different respective character in a system used by data evaluated with the spiking neural network.
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公开(公告)号:US10305976B2
公开(公告)日:2019-05-28
申请号:US14860241
申请日:2015-09-21
Applicant: Intel Corporation
Inventor: Chit Kwan Lin , Arnab Paul , Gautham N. Chinya
IPC: G06F15/173 , H04L29/08
Abstract: A method for managing computing includes replicating a subset of a machine state of a first computing device onto a second computing device, wherein the subset of the machine state is required to execute machine code. Execution of the machine code is offloaded to the second computing device.
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