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公开(公告)号:US11232273B2
公开(公告)日:2022-01-25
申请号:US17067979
申请日:2020-10-12
Applicant: Intel Corporation
Inventor: Gautham Chinya , Shihao Ji , Arnab Paul
Abstract: Systems, apparatuses and methods may provide for replacing floating point matrix multiplication operations with an approximation algorithm or computation in applications that involve sparse codes and neural networks. The system may replace floating point matrix multiplication operations in sparse code applications and neural network applications with an approximation computation that applies an equivalent number of addition and/or subtraction operations.
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公开(公告)号:US11714977B2
公开(公告)日:2023-08-01
申请号:US17554255
申请日:2021-12-17
Applicant: Intel Corporation
Inventor: Gautham Chinya , Shihao Ji , Arnab Paul
CPC classification number: G06K7/10722 , G06F7/483 , G06F7/487 , G06F17/16 , G06K7/1413 , G06N3/04 , G06N3/045 , G06N20/10 , G06F2207/4824
Abstract: Systems, apparatuses and methods may provide for replacing floating point matrix multiplication operations with an approximation algorithm or computation in applications that involve sparse codes and neural networks. The system may replace floating point matrix multiplication operations in sparse code applications and neural network applications with an approximation computation that applies an equivalent number of addition and/or subtraction operations.
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公开(公告)号:US20190130148A1
公开(公告)日:2019-05-02
申请号:US16306736
申请日:2016-06-29
Applicant: Intel Corporation
Inventor: Gautham Chinya , Shihao Ji , Arnab Paul
Abstract: Systems, apparatuses and methods may provide for replacing floating point matrix multiplication operations with an approximation algorithm or computation in applications that involve sparse codes and neural networks. The system may replace floating point matrix multiplication operations in sparse code applications and neural network applications with an approximation computation that applies an equivalent number of addition and/or subtraction operations.
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公开(公告)号:US09910481B2
公开(公告)日:2018-03-06
申请号:US14621731
申请日:2015-02-13
Applicant: Intel Corporation
Inventor: Victor W. Lee , Daehyun Kim , Yuxin Bai , Shihao Ji , Sheng Li , Dhiraj D. Kalamkar , Naveen K. Mellempudi
CPC classification number: G06F1/324 , G06F1/3293 , G06F1/3296 , G06F9/5088 , G06F9/5094 , Y02D10/124 , Y02D10/126 , Y02D10/172 , Y02D10/22 , Y02D10/32
Abstract: In an embodiment, a processor a plurality of cores to independently execute instructions, the cores including a plurality of counters to store performance information, and a power controller coupled to the plurality of cores, the power controller having a logic to receive performance information from at least some of the plurality of counters, determine a number of cores to be active and a performance state for the number of cores for a next operation interval, based at least in part on the performance information and model information, and cause the number of cores to be active during the next operation interval, the performance information associated with execution of a workload on one or more of the plurality of cores. Other embodiments are described and claimed.
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公开(公告)号:US20220108093A1
公开(公告)日:2022-04-07
申请号:US17554255
申请日:2021-12-17
Applicant: Intel Corporation
Inventor: Gautham Chinya , Shihao Ji , Arnab Paul
Abstract: Systems, apparatuses and methods may provide for replacing floating point matrix multiplication operations with an approximation algorithm or computation in applications that involve sparse codes and neural networks. The system may replace floating point matrix multiplication operations in sparse code applications and neural network applications with an approximation computation that applies an equivalent number of addition and/or subtraction operations.
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公开(公告)号:US20210027029A1
公开(公告)日:2021-01-28
申请号:US17067979
申请日:2020-10-12
Applicant: Intel Corporation
Inventor: Gautham Chinya , Shihao Ji , Arnab Paul
Abstract: Systems, apparatuses and methods may provide for replacing floating point matrix multiplication operations with an approximation algorithm or computation in applications that involve sparse codes and neural networks. The system may replace floating point matrix multiplication operations in sparse code applications and neural network applications with an approximation computation that applies an equivalent number of addition and/or subtraction operations.
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