公开(公告)号：US20200257649A1

公开(公告)日：2020-08-13

申请号：US16859996

申请日：2020-04-27

Applicant: Intel Corporation

Inventor： Ziv Kabiry ,  Reuven Rozic ,  Gal Yedidia

IPC: G06F13/42 ,  G06F13/40

Abstract: A universal serial bus (USB) router can include a display port input device to receive a display port signal. The display port input device can include display port link layer parser circuitry to identify display port control or data information from the received display port signal, USB packet construction circuitry to construct a USB packet comprising the display port control or data information identified by the display port link layer parser circuitry, and a USB switch to transmit the USB packet comprising the display control or data information over a USB link. A display port output device can include display port packetizer circuitry to construct a display port packet from the display port control or data information from the USB packet, and display port output circuitry to output the display port packet across a display port link.

公开(公告)号：US10367605B2

公开(公告)日：2019-07-30

申请号：US15089251

申请日：2016-04-01

Applicant: INTEL CORPORATION

Inventor： Nausheen Ansari ,  Ziv Kabiry ,  Gal Yedidia

IPC: H04L1/00 ,  H03M5/14 ,  H03M13/15 ,  H03M13/29 ,  H03M13/31

Abstract: Disclosed herein are techniques to provide forward error correction for a high-speed interconnect symbol stream, such as, DisplayPort. The symbol stream may be split into FEC blocks and parity bits generated for each of the FEC blocks. The parity bits may be interleaved, encoded, and transmitted over an interconnect along with the symbol stream to provide forward error correction for the symbol stream.