公开(公告)号：US09531399B1

公开(公告)日：2016-12-27

申请号：US14861216

申请日：2015-09-22

Applicant: Intel IP Corporation

Inventor： Franz Kuttner

IPC: H03M1/06 ,  H03M1/00 ,  H03M1/68 ,  H03M7/16

CPC classification number: H03M1/0863 ,  H03M1/0845 ,  H03M1/687 ,  H03M1/806 ,  H03M7/165

Abstract: A digital to analog converter (DAC) circuit to convert a digital input signal to an analog output signal, wherein the digital input signal comprises a plurality of Least Significant Bits (LSBs) and a plurality of Most Significant Bits (LSBs). The DAC circuit comprises a line decoder configured to receive the plurality of LSBs of the digital input signal and configured to generate line information based thereon. The DAC circuit further comprises a column decoder configured to receive the plurality of MSBs of the digital input signal and configured to generate column information based thereon. Further, the DAC circuit comprises one or more source cells arranged in a plurality of rows and a plurality of columns, wherein the one or more source cells are configured to be selectively activated and consequently generate an individual output signal based on the line information and the column information respectively.

Abstract translation: 一种用于将数字输入信号转换为模拟输出信号的数模转换器（DAC）电路，其中数字输入信号包括多个最低有效位（LSB）和多个最高有效位（LSB）。 DAC电路包括线解码器，其被配置为接收数字输入信号的多个LSB，并且被配置为基于此产生线信息。 DAC电路还包括列解码器，其被配置为接收数字输入信号的多个MSB，并且被配置为基于此产生列信息。 此外，DAC电路包括布置成多行和多列的一个或多个源单元，其中一个或多个源单元被配置为选择性地激活，并且因此基于线信息生成单独的输出信号，并且 列信息。

公开(公告)号：US09525383B2

公开(公告)日：2016-12-20

申请号：US14570879

申请日：2014-12-15

Applicant: Intel IP Corporation

Inventor： Franz Kuttner

IPC: H04K1/02 ,  H04L25/03 ,  H04L25/49 ,  H03F1/02 ,  H03F3/217 ,  H03F3/19 ,  H04B1/04 ,  H03F1/56 ,  H03F3/00 ,  H03F3/189 ,  H03F3/21 ,  H03F3/24

CPC classification number: H03F1/0205 ,  H03F1/565 ,  H03F3/005 ,  H03F3/189 ,  H03F3/19 ,  H03F3/211 ,  H03F3/2175 ,  H03F3/2176 ,  H03F3/24 ,  H03F2200/171 ,  H03F2200/378 ,  H03F2200/387 ,  H03F2200/391 ,  H03F2200/451 ,  H03F2200/541 ,  H04B1/04 ,  H04B2001/0408

Abstract: This application provides apparatus and methods for a capacitive digital-to-analog converter (CDAC) based power amplifier. In an example, a transmitter amplifier can include an input inductor, a switch having a first node coupled to the input inductor, and a control node, the amplifier configured to receive a first analog representation of an envelope signal at the first node, to receive a second analog representation of the amplitude signal from the inductor, to receive a phase signal at the control node, and to provide a first modulated signal using the phase signal, the first analog representation of the amplitude signal and the second analog representation of the amplitude signal, and a capacitive digital-to-analog converter (CDAC) configured to receive a digital representation of the amplitude signal and to provide the first analog representation of the amplitude signal.

Abstract translation: 该应用提供了一种基于电容数字 - 模拟转换器（CDAC）功率放大器的装置和方法。 在一个示例中，发射机放大器可以包括输入电感器，具有耦合到输入电感器的第一节点的开关以及控制节点，该放大器被配置为在第一节点处接收包络信号的第一模拟表示以接收 来自电感器的幅度信号的第二模拟表示，以在控制节点处接收相位信号，以及使用相位信号提供第一调制信号，振幅信号的第一模拟表示和幅度的第二模拟表示 信号以及被配置为接收幅度信号的数字表示并提供幅度信号的第一模拟表示的电容性数模转换器（CDAC）。