-
公开(公告)号:US12126304B2
公开(公告)日:2024-10-22
申请号:US17481598
申请日:2021-09-22
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Yasutaka Sugimoto
CPC classification number: H03F1/0211 , H03F3/19 , H03F3/21 , H03F2200/381 , H03F2200/451 , H03F2200/465 , H03F2200/468 , H03F2200/471
Abstract: An amplifier circuit includes an input terminal to which a radio frequency signal is input, an amplifier transistor that has a control terminal and amplifies the radio frequency signal, a bias circuit that includes an emitter-follower circuit or a source-follower circuit and supplies a bias current to the control terminal of the amplifier transistor, an inductor arranged in series between an emitter of the emitter-follower circuit and the control terminal of the amplifier transistor or between a source of the source-follower circuit and the control terminal of the amplifier transistor, and a variable resistance circuit connected to the inductor.
-
公开(公告)号:US12089056B2
公开(公告)日:2024-09-10
申请号:US18457317
申请日:2023-08-28
Applicant: Microsoft Technology Licensing, LLC
Inventor: Heping Shi , Ranveer Chandra , Tusher Chakraborty , Nissanka Arachchige Bodhi Priyantha , Zerina Kapetanovic , Binh Ngoc Vu
IPC: H04W16/14 , H03F3/19 , H04W48/16 , H04W72/0453 , H04W72/541
CPC classification number: H04W16/14 , H03F3/19 , H04W48/16 , H04W72/0453 , H04W72/541 , H03F2200/294
Abstract: The disclosure described herein configures a multi-narrowband transceiver for communication within the television white space (TVWS) frequency spectrum using a log periodic filter, wherein the log periodic filter comprises a plurality of filter elements each having a filter frequency increasing periodically in a same frequency increasing factor (K). Each filter of the plurality of filter elements is configured to filter out second harmonics in a defined frequency range. The disclosure determines a TVWS channel for the communication and switches to a filter element of the plurality of filter elements corresponding to the determined TVWS channel. Data is transmitted and/or received over the TVWS channel using the filter element, thereby allowing narrowband communication over the TVWS channel.
-
公开(公告)号:US12081253B2
公开(公告)日:2024-09-03
申请号:US18352424
申请日:2023-07-14
Applicant: STMicroelectronics S.r.l.
Inventor: Nunzio Spina , Giuseppe Palmisano , Alessandro Castorina
CPC classification number: H04B1/16 , H03F3/19 , H03F3/245 , H04L27/06 , H03F2200/451
Abstract: A method for calibrating the DC operating point of a PWM receiver circuit is disclosed. The PWM receiving circuit includes an envelope detector having a first resistor string, and includes a bias circuit having a second resistor string and a plurality of switches. The second resistor string is coupled between a supply voltage and a reference voltage and functions as a voltage divider. Each switch, when closed, accesses a second voltage at a node of the second resistor string connected to the closed switch. To perform the calibration process, the plurality of switches is closed one at a time, and the second voltage is compared with a first voltage at a first node of the first resistor string. The switch that, when closed, produces the smallest difference between the first voltage and the second voltage remains closed after the calibration process, and is used for demodulating the PWM signal.
-
公开(公告)号:US20240283480A1
公开(公告)日:2024-08-22
申请号:US18172377
申请日:2023-02-22
Applicant: Realtek Semiconductor Corp.
Inventor: Ahmed Kord , Chia-Liang (Leon) Lin
CPC classification number: H04B1/40 , H02H9/045 , H03F3/19 , H05K1/0243 , H03F2200/294 , H03F2200/451
Abstract: A radio frequency integrated circuit (RFIC) includes a transmitter, a receiver, a first pin electrically shorted to a first node wherein the transmitter and the receiver are connected, and a second pin electrically shorted to a second node within the receiver. The RFIC is soldered on a printed circuit board (PCB). In a transmitter-receiver co-share configuration, the first pin is terminated with a high-impedance component on the PCB. In a transmitter-receiver split configuration, the first pin and the second pin are coupled through an external capacitor on the PCB.
-
公开(公告)号:US12068749B2
公开(公告)日:2024-08-20
申请号:US18203810
申请日:2023-05-31
Applicant: Reach Power, Inc.
Inventor: Asmita Dani , Christopher Joseph Davlantes
CPC classification number: H03K3/012 , H02M7/217 , H03F3/19 , H03G3/3036 , H03F2200/451 , H03G2201/103 , H03G2201/307
Abstract: A bidirectional RF circuit, preferably including a plurality of terminals, a switch, a transistor, a coupler, and a feedback network. The circuit can optionally include a drain matching network, an input matching network, and/or one or more tuning inputs. In some variations, the circuit can optionally include one or more impedance networks, such as an impedance network used in place of the feedback network; in some such variations, the circuit may not include a coupler, switch, and/or input matching network. A method for circuit operation, preferably including operating in an amplifier mode, operating in a rectifier mode, and/or transitioning between operation modes.
-
公开(公告)号:US20240243738A1
公开(公告)日:2024-07-18
申请号:US18507777
申请日:2023-11-13
Applicant: pSemi Corporation
Inventor: Parvez DARUWALLA , Khushali SHAH
CPC classification number: H03K5/08 , H03F3/19 , H03G11/02 , H03F2200/294 , H03F2200/451
Abstract: Programmable clamping methods and devices providing adjustable clamping powers to accommodate different applications and requirements are disclosed. The described devices can use switchable clamping circuits having different structures, body-controlled clamping circuits, or clamping circuits adjusting their input power levels using programmable resistive ladders. Examples of how the disclosed devices can be combined to improve design flexibility are also provided.
-
公开(公告)号:US12040323B2
公开(公告)日:2024-07-16
申请号:US17394252
申请日:2021-08-04
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Yasunari Umemoto , Shaojun Ma , Shigeki Koya , Kenji Sasaki
IPC: H01L27/06 , H01L29/737 , H03F3/19 , H03F3/21
CPC classification number: H01L27/0647 , H01L29/737 , H03F3/19 , H03F3/21
Abstract: Each of cells arranged on a substrate surface along a first direction includes at least one unit transistor. Collector electrodes are arranged between two adjacent cells. A first cell, which is at least one of the cells, includes unit transistors arranged along the first direction. The unit transistors are connected in parallel to each another. In the first cell, the base electrode and the emitter electrode in each unit transistor are arranged along the first direction, and the order of arrangement of the base electrode and the emitter electrode is the same among the unit transistors. When looking at one first cell, a maximum value of distances in the first direction between the emitter electrodes of two adjacent unit transistors in the first cell being looked at is shorter than ½ of a shorter one of distances between the first cell being looked at and adjacent cells.
-
公开(公告)号:US20240222477A1
公开(公告)日:2024-07-04
申请号:US18438442
申请日:2024-02-10
Applicant: VISUAL PHOTONICS EPITAXY CO., LTD.
Inventor: Chao-Hsing HUANG , Yu-Chung CHIN , Kai-Yu CHEN
IPC: H01L29/737 , H01L23/66 , H01L29/08 , H01L29/205 , H03F3/19 , H03F3/21
CPC classification number: H01L29/737 , H01L23/66 , H01L29/0821 , H01L29/205 , H03F3/19 , H03F3/21 , H01L2223/6644
Abstract: Provided is a high ruggedness heterojunction bipolar transistor (HBT), including a substrate, a sub-collector layer, collector layer, a base layer, and an emitter layer. The collector layer includes a InGaP layer or a wide bandgap layer. The collector layer includes III-V semiconductor material. The bandgap of the wide bandgap layer is greater than that of GaAs.
-
公开(公告)号:US12028051B2
公开(公告)日:2024-07-02
申请号:US17241126
申请日:2021-04-27
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Yasuharu Nakai , Katsuya Daimon
IPC: H03H9/64 , H03F3/195 , H03F3/24 , H03F3/72 , H03H9/02 , H03H9/145 , H03H9/25 , H03H9/72 , H04B1/00 , H04B1/40 , H03F3/19 , H03F3/21
CPC classification number: H03H9/6489 , H03F3/195 , H03F3/245 , H03F3/72 , H03H9/02559 , H03H9/02637 , H03H9/02937 , H03H9/145 , H03H9/25 , H03H9/6483 , H03H9/6496 , H03H9/725 , H04B1/0057 , H04B1/40 , H03F3/19 , H03F3/21 , H03F2200/111 , H03F2200/165 , H03F2200/171 , H03F2200/294 , H03F2200/451 , H03F2203/7209 , H03H9/02834
Abstract: A first filter of a multiplexer includes serial resonators and parallel resonators that are acoustic wave resonators. A first of the serial resonators that is closer to a common terminal than the other serial resonators is connected to the common terminal without the parallel resonators interposed therebetween. Each of the elastic wave resonators includes a substrate having piezoelectricity, an IDT electrode provided on the substrate, and a dielectric layer provided on the substrate to cover the IDT electrode. A thickness of the dielectric layer of the first serial resonator is smaller than a thickness of each of the dielectric layers of the remainder of the elastic wave resonators.
-
公开(公告)号:US12021495B2
公开(公告)日:2024-06-25
申请号:US17566334
申请日:2021-12-30
Applicant: SKYWORKS SOLUTIONS, INC.
Inventor: Junhyung Lee , Johannes Jacobus Emile Maria Hageraats , Yan Yan , Bumkyum Kim , Aravind Kumar Padyana , Joshua Haeseok Cho , Rimal Deep Singh , Bipul Agarwal
CPC classification number: H03G3/3036 , H03F3/19 , H04B1/40 , H03F2200/451 , H03G2201/103 , H03G2201/307
Abstract: Disclosed herein are signal amplifiers that include a plurality of switchable amplifier architectures so that particular gain modes can use dedicated amplifier architectures to provide desired characteristics for those gain modes, such as low noise figure or high linearity. The disclosed signal amplifier architectures provide tailored impedances using a degeneration block or matrix without using switches in the degeneration switching block. The disclosed signal amplifier architectures provide a plurality of gain modes where different gain modes use different paths through the amplifier architecture. Switches that are used to select the path through the amplifier architecture also provide targeted impedances in a degeneration block or matrix. The switches that select the gain path are provided in the amplifier architecture and are thus not needed or used in the degeneration block, thereby reducing the size of the package for the amplifier architecture.
-
-
-
-
-
-
-
-
-