公开(公告)号：US20150037940A1

公开(公告)日：2015-02-05

申请号：US14521261

申请日：2014-10-22

Applicant: Japan Display Inc.

Inventor： Katsuhiro Hoshina ,  Tetsuya Iizuka

IPC: G02F1/1339 ,  H01L27/12 ,  G02F1/1333

CPC classification number: G02F1/1339 ,  G02F1/1333 ,  G02F1/133351 ,  G02F1/13394 ,  G02F2001/133354 ,  H01L27/1259

Abstract: In one embodiment, a liquid crystal display panel includes an array substrate and a counter substrate each having a display region and a peripheral region arranged adjacent to the display region. A resin layer is formed either one of the array substrate and the counter substrate. A protrusion in the shape of a wall is arranged on the resin layer with a gap between the protrusion and the substrate opposing the protrusion. A seal material is formed between the array substrate and the counter substrate, and arranged between a peripheral portion of the display region and the protrusion for attaching the array substrate and the counter substrate. A liquid crystal layer is formed in a surrounded region by the array substrate, the counter substrate and the seal material.

Abstract translation: 在一个实施例中，液晶显示面板包括阵列基板和对置基板，每个阵列基板和相对基板具有布置在显示区域附近的显示区域和周边区域。 在阵列基板和对置基板之一上形成树脂层。 在树脂层上设置有形成为突起的突起，突起与基板相对的突起之间具有间隙。 在阵列基板和对置基板之间形成密封材料，并且布置在显示区域的周边部分和用于安装阵列基板和对置基板的突起之间。 在阵列基板，对置基板和密封材料的周围区域中形成液晶层。

公开(公告)号：US09847426B2

公开(公告)日：2017-12-19

申请号：US15359244

申请日：2016-11-22

Applicant: JAPAN DISPLAY INC.

Inventor： Naoki Miyanaga ,  Tetsuya Iizuka ,  Masanori Ando

IPC: H01L27/14 ,  H01L29/786 ,  H01L27/12 ,  G02F1/1362

CPC classification number: H01L29/78633 ,  G02F1/136209 ,  G02F1/136213 ,  G02F1/136286 ,  H01L27/1222 ,  H01L27/124

Abstract: According to one embodiment, a display device includes a first light shielding layer, a second light shielding layer, a first semiconductor layer, a second semiconductor layer, a gate line, a first source line, a second source line, a switching element, and a pixel electrode, wherein an area in which the first light shielding layer and the pixel electrode are opposed to each other and an area in which the second light shielding layer and the pixel electrode are opposed to each other are equal in size.

公开(公告)号：US09810936B2

公开(公告)日：2017-11-07

申请号：US14018827

申请日：2013-09-05

Applicant: Japan Display Inc.

Inventor： Kazuya Daishi ,  Tetsuya Iizuka

IPC: G02F1/1333 ,  G02F1/1339 ,  G02F1/1337 ,  G02F1/1345

CPC classification number: G02F1/133345 ,  G02F1/1337 ,  G02F1/1339 ,  G02F1/1345

Abstract: According to one embodiment, a display panel includes an array substrate and a counter substrate. The array substrate includes an inorganic insulating film, a first wiring line, a second wiring line, an organic insulating film, a slit and a moisture-proof member. The slit is formed to extend through the organic insulating film between the first wiring line and the second wiring line. The moisture-proof member is filled in the slit and is in contact with the inorganic insulating film.

公开(公告)号：US09548322B2

公开(公告)日：2017-01-17

申请号：US14560229

申请日：2014-12-04

Applicant: Japan Display Inc.

Inventor： Takamitsu Fujimoto ,  Tetsuya Iizuka

IPC: H01L27/01 ,  H01L27/12 ,  G02F1/1345

CPC classification number: H01L27/124 ,  G02F1/1345 ,  H01L27/1222

Abstract: According to one embodiment, a wiring substrate includes a pad group of a first pad to supply a power source voltage of low level, a second pad to supply a power source voltage of high level, and a third pad to supply a necessary signal for displaying an image, a common line, a first connection line to connect the first pad with the common line, a second connection line to connect the second pad with the common line, and a third connection line to connect the third pad with the common line, wherein the first connection line and the second connection line are formed of polysilicon in which no impurity is doped, and the third connection line and the common line are formed of polysilicon in which an impurity is doped.

Abstract translation: 根据一个实施例，布线基板包括用于提供低电平的电源电压的第一焊盘的焊盘组，提供高电平的电源电压的第二焊盘和用于提供用于显示的必要信号的第三焊盘 图像，公共线，将第一焊盘与公共线连接的第一连接线，将第二焊盘与公共线连接的第二连接线以及将第三焊盘与公共线连接的第三连接线， 其中所述第一连接线和所述第二连接线由其中不掺杂杂质的多晶硅形成，并且所述第三连接线和所述公共线由掺杂杂质的多晶硅形成。

公开(公告)号：US09104075B2

公开(公告)日：2015-08-11

申请号：US14475147

申请日：2014-09-02

Applicant: Japan Display Inc.

Inventor： Koji Yamamoto ,  Tetsuya Iizuka

IPC: G02F1/1343 ,  G02F1/1368 ,  G02F1/1362 ,  G02F1/1333

CPC classification number: G02F1/134309 ,  G02F1/133345 ,  G02F1/134363 ,  G02F1/13439 ,  G02F1/136213 ,  G02F1/136286 ,  G02F2001/134381 ,  G02F2001/136218 ,  G02F2201/121

Abstract: In one embodiment, a first shield electrode and a second shield electrode are arranged on a first substrate. A first source line and a second source line are arranged facing the first and second shield electrodes through an insulating layer, respectively. A first main common electrode and a second main common electrode are formed facing the first and second source lines through an insulating layer, respectively. A main pixel electrode is formed so as to locate between the first and second main common electrodes. A second substrate includes a third main common electrode and a fourth main common electrode facing the first and second main common electrodes, respectively. A liquid crystal layer is held between the first and second substrates. The first, second, third and fourth main common electrodes are set to the same electric potential.

Abstract translation: 在一个实施例中，第一屏蔽电极和第二屏蔽电极布置在第一基板上。 第一源极线和第二源极线分别通过绝缘层面向第一和第二屏蔽电极。 第一主公共电极和第二主公共电极分别通过绝缘层面对第一和第二源极线。 主像素电极形成为位于第一和第二主公共电极之间。 第二基板包括分别面对第一和第二主公共电极的第三主公共电极和第四主公共电极。 液晶层保持在第一和第二基板之间。 第一，第二，第三和第四主要公共电极被设置为相同的电位。

公开(公告)号：US10134906B2

公开(公告)日：2018-11-20

申请号：US15808266

申请日：2017-11-09

Applicant: JAPAN DISPLAY INC.

Inventor： Naoki Miyanaga ,  Tetsuya Iizuka ,  Masanori Ando

IPC: H01L27/14 ,  H01L29/786 ,  H01L27/12 ,  G02F1/1362

Abstract: According to one embodiment, a display device includes a first light shielding layer, a second light shielding layer, a first semiconductor layer, a second semiconductor layer, a gate line, a first source line, a second source line, a switching element, and a pixel electrode, wherein an area in which the first light shielding layer and the pixel electrode are opposed to each other and an area in which the second light shielding layer and the pixel electrode are opposed to each other are equal in size.

公开(公告)号：US09470936B2

公开(公告)日：2016-10-18

申请号：US14742088

申请日：2015-06-17

Applicant: JAPAN DISPLAY INC.

Inventor： Koji Yamamoto ,  Tetsuya Iizuka

IPC: G02F1/1343 ,  G02F1/1362 ,  G02F1/1333

CPC classification number: G02F1/134309 ,  G02F1/133345 ,  G02F1/134363 ,  G02F1/13439 ,  G02F1/136213 ,  G02F1/136286 ,  G02F2001/134381 ,  G02F2001/136218 ,  G02F2201/121

Abstract: In one embodiment, a first shield electrode and a second shield electrode are arranged on a first substrate. A first source line and a second source line are arranged facing the first and second shield electrodes through an insulating layer, respectively. A first main common electrode and a second main common electrode are formed facing the first and second source lines through an insulating layer, respectively. A main pixel electrode is formed so as to locate between the first and second main common electrodes. A second substrate includes a third main common electrode and a fourth main common electrode facing the first and second main common electrodes, respectively. A liquid crystal layer is held between the first and second substrates. The first, second, third and fourth main common electrodes are set to the same electric potential.

公开(公告)号：US20150162357A1

公开(公告)日：2015-06-11

申请号：US14560350

申请日：2014-12-04

Applicant: Japan Display Inc.

Inventor： Naoki MIYANAGA ,  Tetsuya Iizuka ,  Masanori Ando

IPC: H01L27/12

CPC classification number: H01L29/78633 ,  G02F1/136209 ,  G02F1/136213 ,  G02F1/136286 ,  H01L27/1222 ,  H01L27/124

Abstract: According to one embodiment, a display device includes a first light shielding layer, a second light shielding layer, a first semiconductor layer, a second semiconductor layer, a gate line, a first source line, a second source line, a switching element, and a pixel electrode, wherein an area in which the first light shielding layer and the pixel electrode are opposed to each other and an area in which the second light shielding layer and the pixel electrode are opposed to each other are equal in size.

Abstract translation: 根据一个实施例，显示装置包括第一遮光层，第二遮光层，第一半导体层，第二半导体层，栅极线，第一源极线，第二源极线，开关元件和 像素电极，其中第一遮光层和像素电极彼此相对的区域以及第二遮光层和像素电极彼此相对的区域的尺寸相等。

公开(公告)号：US20150162352A1

公开(公告)日：2015-06-11

申请号：US14560229

申请日：2014-12-04

Applicant: Japan Display Inc.

Inventor： Takamitsu Fujimoto ,  Tetsuya Iizuka

IPC: H01L27/12 ,  G02F1/1362 ,  G02F1/1368

CPC classification number: H01L27/124 ,  G02F1/1345 ,  H01L27/1222

Abstract: According to one embodiment, a wiring substrate includes a pad group of a first pad to supply a power source voltage of low level, a second pad to supply a power source voltage of high level, and a third pad to supply a necessary signal for displaying an image, a common line, a first connection line to connect the first pad with the common line, a second connection line to connect the second pad with the common line, and a third connection line to connect the third pad with the common line, wherein the first connection line and the second connection line are formed of polysilicon in which no impurity is doped, and the third connection line and the common line are formed of polysilicon in which an impurity is doped.

Abstract translation: 根据一个实施例，布线基板包括用于提供低电平的电源电压的第一焊盘的焊盘组，提供高电平的电源电压的第二焊盘和用于提供用于显示的必要信号的第三焊盘 图像，公共线，将第一焊盘与公共线连接的第一连接线，将第二焊盘与公共线连接的第二连接线以及将第三焊盘与公共线连接的第三连接线， 其中所述第一连接线和所述第二连接线由其中不掺杂杂质的多晶硅形成，并且所述第三连接线和所述公共线由掺杂杂质的多晶硅形成。