公开(公告)号：US07596736B2

公开(公告)日：2009-09-29

申请号：US11277422

申请日：2006-03-24

申请人： Maroun Kassab ,  Leah M. Pfeifer Pastel

发明人： Maroun Kassab ,  Leah M. Pfeifer Pastel

IPC分类号： G01R31/28

CPC分类号： G01R31/3183 ,  G01R31/31703

摘要： An iterative process for identifying systematics in data is provided. In general, a set of data is processed based on a signature definition to create a set of signature data. The set of signature data is then analyzed to identify common signatures. The set of signature data is modified, using knowledge of the common signature(s), creating a revised set of signature data. The revised set of signature data is then analyzed again to identify new common signatures, if any. The modifying and analyzing steps are repeated until no new common signatures are identified. When no new common signatures are identified, the identified common signatures are reported.

摘要翻译： 提供了一种用于识别数据中的系统性的迭代过程。 通常，基于签名定义处理一组数据以创建一组签名数据。 然后分析该组签名数据以识别公共签名。 使用公共签名的知识来修改签名数据集，创建修改后的签名数据集。 然后再次分析经修订的签名数据集，以识别新的公共签名（如果有的话）。 重复修改和分析步骤，直到找不到新的公共签名。 当没有识别出新的共同签名时，报告所识别的共同签名。

公开(公告)号：US20090106614A1

公开(公告)日：2009-04-23

申请号：US11875975

申请日：2007-10-22

申请人： Rao H. Desineni ,  Maroun Kassab ,  Leah M. Pastel

发明人： Rao H. Desineni ,  Maroun Kassab ,  Leah M. Pastel

IPC分类号： G01R31/3181 ,  G06F11/26

CPC分类号： G01R31/318321

摘要： Disclosed are embodiments of a system, method and service for detecting and analyzing systematic conditions occurring in manufactured devices. Each embodiment comprises generating a unique signature for each of multiple tested devices. The signatures are generated based on an initial set of signature definitions and the values for those signature definitions that are derived at least in part from selected testing data. A systematic condition is detected based on commonalities between the signatures. The systematic condition is then analyzed, alone or in conjunction with additional information, in order to develop a list of underlying similarities between the devices. The analysis results can be used to refine the systematic condition detection and analysis processes by revising the signature definitions set and/or by modifying data selection.

摘要翻译： 公开了用于检测和分析在制造的装置中发生的系统状况的系统，方法和服务的实施例。 每个实施例包括为多个被测试设备中的每一个产生唯一的签名。 基于签名定义的初始集合以及至少部分地从选定的测试数据导出的那些签名定义的值来生成签名。 基于签名之间的共同点检测系统条件。 然后单独或与附加信息一起分析系统条件，以便开发设备之间的基本相似性列表。 分析结果可用于通过修改签名定义集和/或通过修改数据选择来完善系统状态检测和分析过程。

公开(公告)号：US08136082B2

公开(公告)日：2012-03-13

申请号：US13102249

申请日：2011-05-06

申请人： Rao H. Desineni ,  Maroun Kassab ,  Franco Motika ,  Leah Marie Pfeifer Pastel

发明人： Rao H. Desineni ,  Maroun Kassab ,  Franco Motika ,  Leah Marie Pfeifer Pastel

IPC分类号： G06F17/50 ,  G06F11/22 ,  G06F19/00

CPC分类号： G01R31/31835

摘要： A method of testing an integrated circuit. The method includes selecting a set of physical features of nets and devices of the integrated circuit, the integrated circuit having pattern input points and pattern observation points connected by the nets, each of the nets defined by an input point and all fan out paths to (i) input points of other nets of the nets or (ii) to the pattern observation points; selecting a measurement unit for each feature of the set of features; assigning a weight to each segment of each fan out path based on a number of the measurement units of the feature in each segment of each fan out path of each of the nets; and generating a set of test patterns optimized for test-coverage and cost based on the weights assigned to each segment of each of the nets of the integrated circuit.

摘要翻译： 一种集成电路测试方法。 该方法包括选择集成电路的网络和设备的一组物理特征，集成电路具有由网络连接的模式输入点和模式观察点，每个网络由输入点定义，并且所有扇出路径到（ i）网的其他网的输入点或（ii）到模式观察点; 为特征集合中的每个特征选择测量单元; 基于每个网络的每个扇出路径的每个段中的特征的测量单元的数量，为每个扇出路径的每个段分配权重; 以及基于分配给集成电路的每个网络的每个段的权重，生成针对测试覆盖和成本优化的一组测试模式。

公开(公告)号：US20110137602A1

公开(公告)日：2011-06-09

申请号：US12633151

申请日：2009-12-08

申请人： Rao H. Desineni ,  Maroun Kassab ,  Mary P. Kusko ,  Leah M. Pastel

发明人： Rao H. Desineni ,  Maroun Kassab ,  Mary P. Kusko ,  Leah M. Pastel

IPC分类号： G01R31/14 ,  G06F17/50

CPC分类号： G06F17/5022 ,  G06F11/261 ,  G06F2217/70

摘要： A method of selecting fault candidates based on the physical layout of an Integrated Circuit (IC) layout, that includes, identifying failing observation points in an IC layout, determining the failing observation points proximity geometry in the IC circuit layout, determining if a proximity criteria for the failing observation points is met, and identifying faults associated with the failing observation points that meet the proximity criteria; and including the identified faults in a fault candidate set.

摘要翻译： 一种基于集成电路（IC）布局的物理布局选择故障候选的方法，其包括：识别IC布局中的故障观察点，确定IC电路布局中的故障观察点接近度几何，确定接近度准则 满足故障观测点，识别符合接近度标准的故障观测点相关故障; 并在故障候选集中包括识别的故障。

公开(公告)号：US07752514B2

公开(公告)日：2010-07-06

申请号：US11924597

申请日：2007-10-25

申请人： Leendert M. Huisman ,  William V. Huott ,  Maroun Kassab ,  Franco Motika

发明人： Leendert M. Huisman ,  William V. Huott ,  Maroun Kassab ,  Franco Motika

IPC分类号： G01R31/28

CPC分类号： G01R31/318533

摘要： Systems, methods and apparatus are provided for isolating a defect in a scan chain. The invention includes modifying a first test mode of a plurality of latches included in a scan chain, operating the latches in the modified first test mode, and operating the plurality of latches included in the scan chain in a second test mode. A portion of the scan chain adjacent and following a stuck-@-0 or stuck-@-1 fault in the scan chain may store and/or output a value complementary to the value on the output of the previous portion of the scan chain due to the fault. Such values may be unloaded from the scan chain and used for diagnosing (e.g., isolating a defect in) the defective scan chain. Numerous other aspects are provided.

摘要翻译： 提供了用于隔离扫描链中的缺陷的系统，方法和装置。 本发明包括修改包括在扫描链中的多个锁存器的第一测试模式，在修改的第一测试模式下操作锁存器，以及在第二测试模式下操作包括在扫描链中的多个锁存器。 扫描链中与扫描链相邻并跟随卡纸 - @ - 0或卡住 - - - 1故障的部分扫描链可以存储和/或输出与扫描链的先前部分的输出值相匹配的值， 到了错误。 这些值可以从扫描链中卸载并用于诊断（例如，分离缺陷）缺陷扫描链。 提供了许多其他方面。

公开(公告)号：US20090240458A1

公开(公告)日：2009-09-24

申请号：US12050207

申请日：2008-03-18

申请人： Rao H. Desineni ,  Maroun Kassab ,  Franco Motika ,  Leah Marie Pfeifer Pastel

发明人： Rao H. Desineni ,  Maroun Kassab ,  Franco Motika ,  Leah Marie Pfeifer Pastel

IPC分类号： G01R31/00

CPC分类号： G01R31/31835

摘要： A method of testing an integrated circuit. The method includes selecting a set of physical features of nets and devices of the integrated circuit, the integrated circuit having pattern input points and pattern observation points connected by the nets, each of the nets defined by an input point and all fan out paths to (i) input points of other nets of the nets or (ii) to the pattern observation points; selecting a measurement unit for each feature of the set of features; assigning a weight to each segment of each fan out path based on a number of the measurement units of the feature in each segment of each fan out path of each of the nets; and generating a set of test patterns optimized for test-coverage and cost based on the weights assigned to each segment of each of the nets of the integrated circuit.

摘要翻译： 一种集成电路测试方法。 该方法包括选择集成电路网络和设备的一组物理特征，集成电路具有由网络连接的模式输入点和模式观察点，每个网络由输入点定义，并且所有扇出路径到（ i）网的其他网的输入点或（ii）到模式观察点; 为特征集合中的每个特征选择测量单元; 基于每个网络的每个扇出路径的每个段中的特征的测量单元的数量，为每个扇出路径的每个段分配权重; 以及基于分配给集成电路的每个网络的每个段的权重，生成针对测试覆盖和成本优化的一组测试模式。

公开(公告)号：US20090132976A1

公开(公告)日：2009-05-21

申请号：US11941998

申请日：2007-11-19

申请人： Rao H. Desineni ,  Maroun Kassab ,  Leah Marie Pfeifer Pastel

发明人： Rao H. Desineni ,  Maroun Kassab ,  Leah Marie Pfeifer Pastel

IPC分类号： G06F17/50

CPC分类号： G01R31/318342

摘要： A method for testing an integrated circuit and analyzing test data. The method includes: defining a set of signal path selection criteria; selecting a subset of signal paths of an integrated circuit design, the selecting signal paths meeting the selection criteria; identifying pattern observation points for each signal path of the subset of signal paths; selecting a set of features associated with the integrated circuit design; applying a set of test patterns to one or more integrated circuit chips; determining failing signal paths of the subset of signal paths for each integrated circuit chip; mapping failing signal paths of the subset of signal paths to the set of features to generate a correspondence between the failing signal paths and the features; and analyzing the correspondence and identifying suspect features of the set of features based on the analyzing.

摘要翻译： 一种用于测试集成电路并分析测试数据的方法。 该方法包括：定义一组信号路径选择标准; 选择集成电路设计的信号路径的子集，所述选择信号路径满足选择标准; 识别信号路径子集的每个信号路径的模式观察点; 选择与集成电路设计相关的一组特征; 将一组测试图案应用于一个或多个集成电路芯片; 确定每个集成电路芯片的信号路径子集的失败信号路径; 将所述信号路径子集的故障信号路径映射到所述特征集合，以产生所述故障信号路径和所述特征之间的对应关系; 并基于分析，分析对应关系并识别该组特征的可疑特征。

公开(公告)号：US08566059B2

公开(公告)日：2013-10-22

申请号：US12633151

申请日：2009-12-08

申请人： Rao H. Desineni ,  Maroun Kassab ,  Mary P. Kusko ,  Leah M. Pastel

发明人： Rao H. Desineni ,  Maroun Kassab ,  Mary P. Kusko ,  Leah M. Pastel

IPC分类号： G06F17/50 ,  G01R31/00

CPC分类号： G06F17/5022 ,  G06F11/261 ,  G06F2217/70

摘要： A method of selecting fault candidates based on the physical layout of an Integrated Circuit (IC) layout, that includes, identifying failing observation points in an IC layout, determining the failing observation points proximity geometry in the IC circuit layout, determining if a proximity criteria for the failing observation points is met, and identifying faults associated with the failing observation points that meet the proximity criteria; and including the identified faults in a fault candidate set.

摘要翻译： 一种基于集成电路（IC）布局的物理布局选择故障候选的方法，其包括：识别IC布局中的故障观察点，确定IC电路布局中的故障观察点接近度几何，确定接近度准则 满足故障观测点，识别符合接近度标准的故障观测点相关故障; 并在故障候选集中包括识别的故障。

公开(公告)号：US07971176B2

公开(公告)日：2011-06-28

申请号：US12050207

申请日：2008-03-18

申请人： Rao H. Desineni ,  Maroun Kassab ,  Franco Motika ,  Leah Marie Pfeifer Pastel

发明人： Rao H. Desineni ,  Maroun Kassab ,  Franco Motika ,  Leah Marie Pfeifer Pastel

IPC分类号： G06F17/50 ,  G06F11/22 ,  G06F19/00

CPC分类号： G01R31/31835

摘要： A method of testing an integrated circuit. The method includes selecting a set of physical features of nets and devices of the integrated circuit, the integrated circuit having pattern input points and pattern observation points connected by the nets, each of the nets defined by an input point and all fan out paths to (i) input points of other nets of the nets or (ii) to the pattern observation points; selecting a measurement unit for each feature of the set of features; assigning a weight to each segment of each fan out path based on a number of the measurement units of the feature in each segment of each fan out path of each of the nets; and generating a set of test patterns optimized for test-coverage and cost based on the weights assigned to each segment of each of the nets of the integrated circuit.

摘要翻译： 一种集成电路测试方法。 该方法包括选择集成电路的网络和设备的一组物理特征，集成电路具有由网络连接的模式输入点和模式观察点，每个网络由输入点定义，并且所有扇出路径到（ i）网的其他网的输入点或（ii）到模式观察点; 为特征集合中的每个特征选择测量单元; 基于每个网络的每个扇出路径的每个段中的特征的测量单元的数量，为每个扇出路径的每个段分配权重; 以及基于分配给集成电路的每个网络的每个段的权重，生成针对测试覆盖和成本优化的一组测试模式。

公开(公告)号：US07313744B2

公开(公告)日：2007-12-25

申请号：US10708380

申请日：2004-02-27

申请人： Leendert M. Huisman ,  William V. Huott ,  Maroun Kassab ,  Franco Motika

发明人： Leendert M. Huisman ,  William V. Huott ,  Maroun Kassab ,  Franco Motika

IPC分类号： G01R31/28

CPC分类号： G01R31/318533

摘要： Systems, methods and apparatus are provided for isolating a defect in a scan chain. The invention includes modifying a first test mode of a plurality of latches included in a scan chain, operating the latches in the modified first test mode, and operating the plurality of latches included in the scan chain in a second test mode. A portion of the scan chain adjacent and following a stuck-@-0 or stuck-@-1 fault in the scan chain may store and/or output a value complementary to the value on the output of the previous portion of the scan chain due to the fault. Such values may be unloaded from the scan chain and used for diagnosing (e.g., isolating a defect in) the defective scan chain. Numerous other aspects are provided.

摘要翻译： 提供了用于隔离扫描链中的缺陷的系统，方法和装置。 本发明包括修改包括在扫描链中的多个锁存器的第一测试模式，在修改的第一测试模式下操作锁存器，以及在第二测试模式下操作包括在扫描链中的多个锁存器。 扫描链中与扫描链相邻并跟随卡纸 - @ - 0或卡住 - - - 1故障的部分扫描链可以存储和/或输出与扫描链的先前部分的输出值相匹配的值， 到了错误。 这些值可以从扫描链中卸载并用于诊断（例如，分离缺陷）缺陷扫描链。 提供了许多其他方面。