SEMICONDUCTOR DEVICE
    14.
    发明申请

    公开(公告)号:US20220209014A1

    公开(公告)日:2022-06-30

    申请号:US17561996

    申请日:2021-12-27

    Abstract: According to one embodiment, a semiconductor device includes a first insulating film formed of silicon nitride, a second insulating film disposed above the first insulating film and formed of silicon oxide, including a first region and a peripheral region surrounding the first region and thinner than the first region, an oxide semiconductor disposed on the second insulating film and intersecting the first region, a source electrode overlapping the peripheral region and a drain electrode overlapping the peripheral region. The first region is located between the source electrode and the drain electrode and separated from the source electrode and the drain electrode.

    SEMICONDUCTOR DEVICE
    15.
    发明申请

    公开(公告)号:US20220173248A1

    公开(公告)日:2022-06-02

    申请号:US17523054

    申请日:2021-11-10

    Abstract: A semiconductor device includes a thin-film transistor. The thin-film transistor comprises an oxide semiconductor layer, a gate insulating layer, a gate electrode overlapped on the oxide semiconductor layer through the gate insulating layer, a source electrode in contact with the oxide semiconductor layer, a drain electrode in contact with the oxide semiconductor layer and n (n is a natural number) metal layer(s) in contact with the oxide semiconductor layer and disposed across the oxide semiconductor layer between the source electrode and the drain electrode. The oxide semiconductor layer has (n+1) channel regions between the source electrode and the drain electrode in a plan view.

    SEMICONDUCTOR DEVICE COMPRISING LIGHTLY DOPED DRAIN (LDD) REGION BETWEEN CHANNEL AND DRAIN REGION

    公开(公告)号:US20250126845A1

    公开(公告)日:2025-04-17

    申请号:US18960190

    申请日:2024-11-26

    Abstract: The purpose of the present invention is to suppress a variation in a threshold voltage (Δ Vth) in a Thin Film Transistor (TFT) using an oxide semiconductor. The present invention takes a structure as follows to attain this purpose. A semiconductor device having TFT using an oxide semiconductor including: a channel region, a source region, a drain region, and a transition region between the channel region and the source region and between the channel region and the drain region, in which a resistivity of the transition region is smaller than that of the channel region, and larger than that of the source region or the drain region; a source electrode is formed overlapping the source region, and a drain electrode is formed overlapping the drain region; and a thickness of the transition region of the oxide semiconductor is larger than a thickness of the channel region of the oxide semiconductor.

    DISPLAY DEVICE
    18.
    发明公开
    DISPLAY DEVICE 审中-公开

    公开(公告)号:US20240168335A1

    公开(公告)日:2024-05-23

    申请号:US18502178

    申请日:2023-11-06

    CPC classification number: G02F1/133615 G02F1/1334 H01L27/1225

    Abstract: A display device includes a first nitride insulating film arranged on a first substrate, a gate electrode arranged along a first direction on the first nitride insulating film, a second nitride insulating film arranged on the gate electrode, a first oxide insulating film arranged on the second nitride insulating film, and an oxide semiconductor layer arranged on the first oxide insulating film, wherein the gate electrode has a first titanium layer, an aluminum layer, and a second titanium layer stacked in order from the first nitride insulating film side, and a thickness of the second titanium layer is greater than a thickness of the first titanium layer.

    DISPLAY DEVICE
    19.
    发明公开
    DISPLAY DEVICE 审中-公开

    公开(公告)号:US20240160069A1

    公开(公告)日:2024-05-16

    申请号:US18509920

    申请日:2023-11-15

    CPC classification number: G02F1/136286 G02F1/133365 G02F1/133615

    Abstract: A display device includes a wiring region including a gate wiring, a source wiring intersecting the gate wiring, and a first insulating layer between the gate wiring and the source wiring and an opening region including a pixel electrode on the first insulating layer and adjacent to the wiring region. The first insulating layer includes a first oxide insulating layer and a first nitride insulating layer, the first oxide insulating layer is disposed over the wiring region and the opening region, the first nitride insulating layer is disposed in the wiring region and includes a first opening overlapping the opening region, and the pixel electrode overlaps the first opening.

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