公开(公告)号：US20240402554A1

公开(公告)日：2024-12-05

申请号：US18671088

申请日：2024-05-22

Applicant: Japan Display Inc.

Inventor： Akihiro HANADA

IPC: G02F1/1368 ,  G02F1/1333 ,  G02F1/1362 ,  H01L27/12 ,  H01L29/786

Abstract: A display device includes a first conductive layer, a first insulating film arranged on the first conductive layer, an oxide semiconductor layer arranged on the first insulating film, a second conductive layer arranged on the first insulating film and connected to the oxide semiconductor layer, a planarization layer arranged on the oxide semiconductor layer, a first transparent conductive layer in contact with the second conductive layer inside an opening in the planarization layer, and a second transparent conductive layer in contact with the first transparent conductive layer inside the opening.

公开(公告)号：US20240402552A1

公开(公告)日：2024-12-05

申请号：US18798914

申请日：2024-08-09

Applicant: Japan Display Inc.

Inventor： Toshihide JINNAI ,  Hajime WATAKABE ,  Akihiro HANADA ,  Ryo ONODERA ,  lsao SUZUMURA

IPC: G02F1/1362 ,  G02F1/1368 ,  H01L27/12 ,  H01L29/786 ,  H10K59/131

Abstract: A display device including a substrate having a first TFT of an oxide semiconductor and a second TFT of a polysilicon semiconductor comprising: the oxide semiconductor is covered by a first insulating film, a first drain electrode is connected to the oxide semiconductor via a first through hole formed in the first insulating film, a first source electrode is connected to the oxide semiconductor via second through hole formed in the first insulating film in the first TFT, a second insulating film is formed covering the first drain electrode and the first source electrode, a drain wiring connects to the first drain electrode via a third through hole formed in the second insulating film, a source wiring is connected to the first source electrode via a fourth through hole formed in the second insulating film.

公开(公告)号：US20240085750A1

公开(公告)日：2024-03-14

申请号：US18448437

申请日：2023-08-11

Applicant: Japan Display Inc.

Inventor： Takuo KAITOH ,  Akihiro HANADA ,  Yoshinori TANAKA

IPC: G02F1/1362

CPC classification number: G02F1/136286

Abstract: A display device includes a first substrate, a gate wiring on the first substrate, a first insulating layer on the gate wiring, a source wiring on the first insulating layer and intersecting the gate wiring, a second insulating layer on the source wiring, a pixel electrode on the second insulating layer; and a first buffer layer between the first substrate and the first insulating layer. A refractive index of the first buffer layer is higher than a refractive index of the first substrate, at an interface between the first buffer layer and the first substrate, and the refractive index of the first buffer layer is lower than a refractive index of the first insulating layer, at an interface between the first buffer layer and the first insulating layer.

公开(公告)号：US20230231056A1

公开(公告)日：2023-07-20

申请号：US18155083

申请日：2023-01-17

Applicant: Japan Display Inc.

Inventor： Akihiro HANADA

IPC: H01L29/786 ,  G02F1/1362 ,  G02F1/1368

CPC classification number: H01L29/7869 ,  G02F1/136286 ,  G02F1/1368

Abstract: According to one embodiment, a semiconductor device includes a first gate electrode formed integrally with a scanning line, an oxide semiconductor layer, first and second signal lines which are in contact with the oxide semiconductor layer, and a second gate electrode provided so as to face the first gate electrode across the oxide semiconductor layer therebetween and connected to the first gate electrode. The second gate electrode is provided between the first signal line and the second signal line and does not overlap the first signal line or the second signal line.

公开(公告)号：US20230059822A1

公开(公告)日：2023-02-23

申请号：US17889402

申请日：2022-08-17

Applicant: Japan Display Inc.

Inventor： Akihiro HANADA ,  Hajime WATAKABE

IPC: H01L29/786 ,  H01L27/12 ,  H01L29/423 ,  H01L29/66 ,  G02F1/1368

Abstract: According to one embodiment, a transistor includes a first gate electrode, a second gate electrode, an oxide semiconductor layer disposed between the first gate electrode and the second gate electrode, and a source electrode and a drain electrode each connected to the oxide semiconductor layer, wherein the oxide semiconductor layer includes a channel forming region, a source region, and a drain region, a light irradiation region which is made low-resistance by irradiating light thereto is each formed between the channel forming region and the source region and between the channel forming region and the drain region, and the first date electrode and the second gate electrode have different lengths.

公开(公告)号：US20230058988A1

公开(公告)日：2023-02-23

申请号：US17891162

申请日：2022-08-19

Applicant: Japan Display Inc.

Inventor： Akihiro HANADA ,  Hajime WATAKABE ,  Takeshi SAKAI

IPC: H01L29/786 ,  H01L29/10 ,  H01L29/423 ,  H01L29/417

Abstract: According to one embodiment, a transistor includes a gate electrode, an oxide semiconductor layer which overlaps the gate electrode and including a central portion and an end portion, and a source electrode and a drain electrode each connected to the oxide semiconductor layer, wherein an oxidation degree of the end portion is lower than an oxidation degree of the central portion, and a length of the gate electrode overlapping the central portion is greater than a length of the gate electrode overlapping the end portion.

公开(公告)号：US20210257402A1

公开(公告)日：2021-08-19

申请号：US17167081

申请日：2021-02-04

Applicant: Japan Display Inc.

Inventor： Hajime WATAKABE ,  Akihiro HANADA ,  Marina MOCHIZUKI ,  Ryo ONODERA ,  Fumiya KIMURA ,  Isao SUZUMURA

IPC: H01L27/146

Abstract: The present invention provides a technology which realizes a reliable semiconductor device including a photosensor device by preventing pent roofs of edges of a P+ layer from being generated and a metal wiring installed over the P+ layer from coming down while securing the electrical conductivity of the P+ layer. The semiconductor device includes a photosensor including a photodiode formed on a substrate. The photodiode includes: a cathode electrode; a laminated structure that is formed on the cathode electrode and in which an N+ layer, an I layer, and a P+ layer are laminated in this order; an anode electrode formed on the P+ layer; a first insulating film formed so as to cover a portion of the anode electrode and edges of the laminated structure; and a metal wiring connected to the anode electrode. The edges of the laminated structure are formed in forward tapered shapes in a cross-sectional view.

公开(公告)号：US20210011536A1

公开(公告)日：2021-01-14

申请号：US17034722

申请日：2020-09-28

Applicant: Japan Display Inc.

Inventor： Akihiro HANADA ,  Hajime WATAKABE ,  Kazufumi WATABE

IPC: G06F1/26 ,  H01L27/12 ,  H04L12/24 ,  H04L12/853 ,  H04L29/08

Abstract: According to one embodiment, a semiconductor device includes an insulating substrate, a first semiconductor layer formed of silicon and positioned above the insulating substrate, a second semiconductor layer formed of a metal oxide and positioned above the first semiconductor layer, a first insulating film formed of a silicon nitride and positioned between the first semiconductor layer and the second semiconductor layer, and a block layer positioned between the first semiconductor film and the second semiconductor layer, the block layer hydrogen diffusion of which is lower than that of the first insulating film.

公开(公告)号：US20200251505A1

公开(公告)日：2020-08-06

申请号：US16852925

申请日：2020-04-20

Applicant: Japan Display Inc.

Inventor： Hajime WATAKABE ,  Isao SUZUMURA ,  Akihiro HANADA ,  Yohei YAMAGUCHI

IPC: H01L27/12 ,  H01L29/24 ,  H01L29/786 ,  H01L29/66

Abstract: A display device including a substrate having thin film transistors (TFT) comprising: the TFT including an oxide semiconductor film, a gate electrode and an insulating film formed between the oxide semiconductor film and the gate electrode, wherein a first aluminum oxide film and a second aluminum oxide film, which is formed on the first aluminum oxide film, are formed between the insulating film and the gate electrode, an oxygen concentration in the first aluminum oxide film is bigger than an oxygen concentration in the second aluminum oxide film.

公开(公告)号：US20190244979A1

公开(公告)日：2019-08-08

申请号：US15929125

申请日：2019-04-18

Applicant: Japan Display Inc.

Inventor： Isao SUZUMURA ,  Yohei YAMAGUCHI ,  Hajime WATAKABE ,  Akihiro HANADA ,  Hirokazu WATANABE ,  Marina SHIOKAWA

IPC: H01L27/12 ,  H01L29/49 ,  H01L21/02 ,  H01L29/786 ,  H01L29/66 ,  H01L21/4763 ,  H01L21/465

CPC classification number: H01L27/1225 ,  G02F1/133305 ,  G02F1/13452 ,  G02F1/136227 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/136295 ,  G02F2202/10 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02178 ,  H01L21/02565 ,  H01L21/465 ,  H01L21/47635 ,  H01L27/1218 ,  H01L27/124 ,  H01L27/1248 ,  H01L27/1266 ,  H01L27/127 ,  H01L27/3248 ,  H01L27/3262 ,  H01L27/3276 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/4983 ,  H01L29/66969 ,  H01L29/78648 ,  H01L29/7869

Abstract: A display device to improve reliability of the TFT of the oxide semiconductor, including: a substrate including a display area where plural pixels are formed, the pixel includes a first TFT of a first oxide semiconductor; a first gate insulating film is formed on the first oxide semiconductor, a gate electrode is formed on the first gate insulating film, an interlayer insulating film is formed over the gate electrode; the gate insulating film includes a first silicon oxide film, the gate electrode includes a first gate layer made of a second oxide semiconductor and a second gate layer made of metal or alloy; the interlayer insulating film has a first interlayer insulating film including a second silicon oxide film, and a second interlayer insulating film including a first aluminum oxide film on the first interlayer insulating film.