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    System and method for efficient modeling of NPskew effects on static timing tests
    14.
    发明授权
    System and method for efficient modeling of NPskew effects on static timing tests 有权
    对静态时序测试的NPskew效应进行有效建模的系统和方法

    公开(公告)号：US08768679B2

    公开(公告)日：2014-07-01

    申请号：US12894286

    申请日：2010-09-30

    申请人： Nathan C. Buck ,  Brian M. Dreibelbis ,  John P. Dubuque ,  Eric A. Foreman ,  Peter A. Habitz ,  Jeffrey G. Hemmett ,  Natesan Venkateswaran ,  Chandramouli Visweswariah ,  Xiaoyue X. Wang

    发明人： Nathan C. Buck ,  Brian M. Dreibelbis ,  John P. Dubuque ,  Eric A. Foreman ,  Peter A. Habitz ,  Jeffrey G. Hemmett ,  Natesan Venkateswaran ,  Chandramouli Visweswariah ,  Xiaoyue X. Wang

    IPC分类号： G06F17/50 ,  G06F7/60 ,  G06F13/10 ,  G06F11/26

    CPC分类号： G06F13/105 ,  G06F11/261 ,  G06F17/50 ,  G06F17/5036

    摘要： A computer-implemented method that simulates NPskew effects on a combination NFET (Negative Field Effect Transistor)/PFET (Positive Field Effect Transistor) semiconductor device using slew perturbations includes performing a timing test by a computing device, by: (1) evaluating perturb slews in Strong N/Weak P directions on the combination semiconductor device for a timing test result; (2) evaluation perturb slews in Weak N/Strong P directions on the combination semiconductor device for a timing test result; and (3) evaluating unperturbed slews in a balanced condition on the combination semiconductor device for a timing test result. After each test is performed, a determination is made as to which evaluation of the perturbed and unperturbed slews produces a most conservative timing test result for the combination semiconductor device. An NPskew effect adjusted timing test result is finally output based on determining the most conservative timing test result.

    摘要翻译： 使用摆动扰动模拟组合NFET（负场效应晶体管）/ PFET（正场效应晶体管）/ PFET（正场效应晶体管））半导体器件的NPskew效应的计算机实现的方法包括通过以下方式执行计算设备的定时测试：（1）评估干扰压摆 在组合半导体器件上以强N /弱P方向进行定时测试结果; （2）组合半导体器件的评估扰动在弱N /强P方向上的时序测试结果; 和（3）在组合半导体器件上对平衡状态下的非扰动压摆进行定时测试结果。 在执行每个测试之后，确定扰动和未扰动的压摆的哪个评估对组合半导体器件产生最保守的定时测试结果。 基于确定最保守的定时测试结果，最终输出NPskew效果调整的定时测试结果。

    SYSTEM AND METHOD FOR EFFICIENT MODELING OF NPSKEW EFFECTS ON STATIC TIMING TESTS
    16.
    发明申请
    SYSTEM AND METHOD FOR EFFICIENT MODELING OF NPSKEW EFFECTS ON STATIC TIMING TESTS 有权
    用于有效建模静态时间测试的NPSKEW效应的系统和方法

    公开(公告)号：US20120084066A1

    公开(公告)日：2012-04-05

    申请号：US12894286

    申请日：2010-09-30

    申请人： Nathan C. Buck ,  Brian M. Dreibelbis ,  John P. Dubuque ,  Eric A. Foreman ,  Peter A. Habitz ,  Jeffrey G. Hemmett ,  Natesan Venkateswaran ,  Chandramouli Visweswariah ,  Xiaoyue X. Wang

    发明人： Nathan C. Buck ,  Brian M. Dreibelbis ,  John P. Dubuque ,  Eric A. Foreman ,  Peter A. Habitz ,  Jeffrey G. Hemmett ,  Natesan Venkateswaran ,  Chandramouli Visweswariah ,  Xiaoyue X. Wang

    IPC分类号： G06F17/50

    CPC分类号： G06F13/105 ,  G06F11/261 ,  G06F17/50 ,  G06F17/5036

    摘要： A computer-implemented method that simulates NPskew effects on a combination NFET (Negative Field Effect Transistor)/PFET (Positive Field Effect Transistor) semiconductor device using slew perturbations includes performing a timing test by a computing device, by: (1) evaluating perturb slews in Strong N/Weak P directions on the combination semiconductor device for a timing test result; (2) evaluation perturb slews in Weak N/Strong P directions on the combination semiconductor device for a timing test result; and (3) evaluating unperturbed slews in a balanced condition on the combination semiconductor device for a timing test result. After each test is performed, a determination is made as to which evaluation of the perturbed and unperturbed slews produces a most conservative timing test result for the combination semiconductor device. An NPskew effect adjusted timing test result is finally output based on determining the most conservative timing test result.

    摘要翻译： 使用摆动扰动模拟组合NFET（负场效应晶体管）/ PFET（正场效应晶体管）/ PFET（正场效应晶体管））半导体器件的NPskew效应的计算机实现的方法包括通过以下方式执行计算设备的定时测试：（1）评估干扰压摆 在组合半导体器件上以强N /弱P方向进行定时测试结果; （2）组合半导体器件的评估扰动在弱N /强P方向上的时序测试结果; 和（3）在组合半导体器件上对平衡状态下的非扰动压摆进行定时测试结果。 在执行每个测试之后，确定扰动和未扰动的压摆的哪个评估对组合半导体器件产生最保守的定时测试结果。 基于确定最保守的定时测试结果，最终输出NPskew效果调整的定时测试结果。

    Method and apparatus for efficient incremental statistical timing analysis and optimization
    18.
    发明授权
    Method and apparatus for efficient incremental statistical timing analysis and optimization 有权
    用于高效增量统计时序分析和优化的方法和装置

    公开(公告)号：US08104005B2

    公开(公告)日：2012-01-24

    申请号：US12244512

    申请日：2008-10-02

    申请人： Debjit Sinha ,  Natesan Venkateswaran ,  Chandramouli Visweswariah ,  Jinjun Xiong ,  Vladimir Zolotov

    发明人： Debjit Sinha ,  Natesan Venkateswaran ,  Chandramouli Visweswariah ,  Jinjun Xiong ,  Vladimir Zolotov

    IPC分类号： G06F17/50

    CPC分类号： G06F17/5031 ,  G06F2217/10 ,  G06F2217/84

    摘要： In one embodiment, the invention is a method and apparatus for efficient incremental statistical timing analysis and optimization. One embodiment of a method for determining an incremental extrema of n random variables, given a change to at least one of the n random variables, includes obtaining the n random variables, obtaining a first extrema for the n random variables, where the first extrema is an extrema computed prior to the change to the at least one of the n random variables, removing the at least one of the n random variables to form an (n−1) subset, computing a second extrema for the (n−1) subset in accordance with the first extrema and the at least one of the n random variables, and outputting a new extrema of the n random variables incrementally based on the extrema of the (n−1) subset and the at least one of the n random variables that changed.

    摘要翻译： 在一个实施例中，本发明是一种用于有效增量统计时序分析和优化的方法和装置。 给定对n个随机变量中的至少一个的改变的用于确定n个随机变量的增量极值的方法的一个实施例包括获得n个随机变量，获得n个随机变量的第一极值，其中第一极值是 在对所述n个随机变量中的至少一个随机变量进行改变之前计算的极值，去除所述n个随机变量中的所述至少一个以形成（n-1）子集，计算所述（n-1）子集的第二极值 根据第一极值和n个随机变量中的至少一个，并且基于第（n-1）个子集的极值和n个随机变量中的至少一个来递增地输出n个随机变量的新的极值 改变了。

    Method of Measuring the Impact of Clock Skew on Slack During a Statistical Static Timing Analysis
    19.
    发明申请
    Method of Measuring the Impact of Clock Skew on Slack During a Statistical Static Timing Analysis 有权
    在统计静态时序分析中测量时钟偏移对松弛影响的方法

    公开(公告)号：US20120047477A1

    公开(公告)日：2012-02-23

    申请号：US12857591

    申请日：2010-08-17

    申请人： Kerim Kalafala ,  Natesan Venkateswaran ,  Chandramouli Visweswariah ,  Vladimir Zolotov

    发明人： Kerim Kalafala ,  Natesan Venkateswaran ,  Chandramouli Visweswariah ,  Vladimir Zolotov

    IPC分类号： G06F9/455 ,  G06F17/50

    CPC分类号： G06F17/5031 ,  G06F2217/84

    摘要： Computing accurately and effectively the impact of clock skew on statistical slack in the presence of statistically variable timing quantities that accounts for both common path credit in the common portion of the clock tree, and RSS credit in the non-common of the clock tree. The clock skew is measured on a per launch and capture path-pair basis as a function of on the post-CPPR path-specific slack (including RSS credit), total mean value of latch-to-latch delay, RSS value of random latch-to-latch delay, test guard time and test adjust. The method includes: performing an initial block-based SSTA including CPPR analysis; selecting at least one launch and capture path-pair for skew analysis; for the at least one path pair, recording post CPPR slack, total mean value of latch-to-latch delay, RSS value of latch to latch delay, test guard time and test adjust; and quantifying the impact of clock skew on statistical slack thereof.

    摘要翻译： 计算时钟偏差对统计松弛的影响，存在统计上可变的时序量，这些时间量占时钟树共同部分的公共路径信誉，以及时钟树非共同的RSS信用。 时钟偏移在每个发射和捕获路径对的基础上测量，作为后CPPR路径特定松弛（包括RSS信用），锁存到锁存延迟的总平均值，随机锁存的RSS值的函数 到锁定延迟，测试保护时间和测试调整。 该方法包括：执行初始的基于块的SSTA，包括CPPR分析; 选择至少一个启动和捕获路径对进行​​偏差分析; 对于至少一个路径对，记录后CPPR松弛，锁存到锁存延迟的总平均值，锁存器的RSS值到锁存延迟，测试保护时间和测试调整; 并量化时钟偏移对其统计松弛的影响。

    Method, system, and program product for accommodating spatially-correlated variation in a process parameter
    20.
    发明授权
    Method, system, and program product for accommodating spatially-correlated variation in a process parameter 失效
    用于在过程参数中适应空间相关变化的方法，系统和程序产品

    公开(公告)号：US07212946B1

    公开(公告)日：2007-05-01

    申请号：US11272234

    申请日：2005-11-10

    申请人： Natesan Venkateswaran ,  Chandramouli Visweswariah ,  Lizheng Zhang ,  Vladimir Zolotov

    发明人： Natesan Venkateswaran ,  Chandramouli Visweswariah ,  Lizheng Zhang ,  Vladimir Zolotov

    IPC分类号： G06F17/18 ,  G06F15/00 ,  G06F19/00

    CPC分类号： G06F17/5031

    摘要： The invention provides a method, system, and program product for accommodating spatially-correlated variation in a process parameter during statistical timing of a circuit. In one embodiment, the method includes dividing an area of the circuit into a plurality of grid cells; associating an independent random variable with each of the plurality of grid cells; and expressing at least one spatially-correlated parameter of a first grid cell as a function of the random variables associated with the first grid cell and at least one neighboring grid cell.

    摘要翻译： 本发明提供一种用于在电路的统计定时期间适应处理参数的空间相关变化的方法，系统和程序产品。 在一个实施例中，该方法包括将电路的区域划分成多个网格单元; 将独立随机变量与所述多个网格单元中的每一个相关联; 以及将与第一网格单元和至少一个相邻网格单元相关联的随机变量的函数表达为第一网格单元的至少一个空间相关参数。