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11.发明申请公开(公告)号：US20130246699A1
公开(公告)日：2013-09-19
申请号：US13421640
申请日：2012-03-15
IPC分类号： G06F12/00
CPC分类号： G06F9/30018 , G06F9/30021 , G06F9/30036 , G06F9/30043
摘要： The length of character data having a termination character is determined. The character data for which the length is to be determined is loaded, in parallel, within one or more vector registers. An instruction is used that loads data in a vector register to a specified boundary, and provides a way to determine the number of characters loaded, using, for instance, another instruction. Further, an instruction is used to find the index of the first termination character, e.g., the first zero or null character. This instruction searches the data in parallel for the termination character. By using these instructions, the length of the character data is determined using only one branch instruction.
摘要翻译： 确定具有终止字符的字符数据的长度。 要确定长度的字符数据并行加载到一个或多个向量寄存器中。 使用将向量寄存器中的数据加载到指定边界的指令，并且提供了使用例如另一个指令来确定加载的字符数的方法。 此外，使用指令来找到第一终止字符的索引，例如，第一个零或空字符。 该指令并行搜索终止字符的数据。 通过使用这些指令，仅使用一个分支指令来确定字符数据的长度。
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12.发明授权公开(公告)号：US09459868B2
公开(公告)日：2016-10-04
申请号：US13421599
申请日：2012-03-15
申请人： Jonathan D. Bradbury , Michael K. Gschwind , Christian Jacobi , Eric M. Schwarz , Timothy J. Slegel
发明人： Jonathan D. Bradbury , Michael K. Gschwind , Christian Jacobi , Eric M. Schwarz , Timothy J. Slegel
CPC分类号： G06F9/30043 , G06F9/30036 , G06F9/3013 , G06F9/3824 , G06F12/0875 , G06F2212/452
摘要： A Load to Block Boundary instruction is provided that loads a variable number of bytes of data into a register while ensuring that a specified memory boundary is not crossed. The boundary is dynamically determined based on a specified type of boundary and one or more characteristics of the processor executing the instruction, such as cache line size or page size used by the processor.
摘要翻译： 加载到块提供了将可变数量的字节数据加载到寄存器中，同时确保指定的存储器边界未被越过。 边界根据指定类型的边界和执行指令的处理器的一个或多个特性（例如由处理器使用的高速缓存行大小或页面大小）动态地确定。
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公开(公告)号：US20140025929A1
公开(公告)日：2014-01-23
申请号：US13552109
申请日：2012-07-18
IPC分类号： G06F9/30
CPC分类号： G06F9/30112 , G06F9/30141 , G06F9/3838
摘要： Embodiments relate to reducing a number of read ports for register pairs. An aspect includes maintaining an active pairing indicator that is configured to have a first value or a second value. The first value indicates that the wide operand is stored in a wide register. The second value indicates that the wide operand is not stored in the wide register. The operand is read from either the wide register or a pair of registers based on the active pairing indicator. The active pairing indicator and the values of the set of wide registers are stored to a storage based on a request to store a register pairing status. A saved pairing indicator and saved values of the set of wide registers is loaded from the storage respectively into an active pairing register and wide registers.
摘要翻译： 实施例涉及减少用于寄存器对的多个读端口。 一个方面包括维持被配置为具有第一值或第二值的活动配对指示符。 第一个值表示宽操作数存储在一个宽的寄存器中。 第二个值表示宽操作数不存储在宽寄存器中。 基于活动配对指示器，从宽寄存器或一对寄存器读取操作数。 基于存储寄存器配对状态的请求，将活动配对指示符和宽寄存器组的值存储到存储器中。 一组保存的配对指示器和一组宽寄存器的保存值分别从存储器加载到有源配对寄存器和宽寄存器中。
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14.发明申请公开(公告)号：US20130246740A1
公开(公告)日：2013-09-19
申请号：US13421599
申请日：2012-03-15
申请人： Jonathan D. Bradbury , Michael K. Gschwind , Christian Jacobi , Eric M. Schwarz , Timothy J. Slegel
发明人： Jonathan D. Bradbury , Michael K. Gschwind , Christian Jacobi , Eric M. Schwarz , Timothy J. Slegel
CPC分类号： G06F9/30043 , G06F9/30036 , G06F9/3013 , G06F9/3824 , G06F12/0875 , G06F2212/452
摘要： A Load to Block Boundary instruction is provided that loads a variable number of bytes of data into a register while ensuring that a specified memory boundary is not crossed. The boundary is dynamically determined based on a specified type of boundary and one or more characteristics of the processor executing the instruction, such as cache line size or page size used by the processor.
摘要翻译： 加载到块提供了将可变数量的字节数据加载到寄存器中，同时确保指定的存储器边界未被越过。 边界根据指定类型的边界和执行指令的处理器的一个或多个特性（例如由处理器使用的高速缓存行大小或页面大小）动态地确定。
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公开(公告)号：US09588762B2
公开(公告)日：2017-03-07
申请号：US13421442
申请日：2012-03-15
CPC分类号： G06F9/3001 , G06F9/30018 , G06F9/30021 , G06F9/30036 , G06F9/30047 , G06F9/30185 , G06F9/45516
摘要： Processing of character data is facilitated. A Find Element Not Equal instruction is provided that compares data of multiple vectors for inequality and provides an indication of inequality, if inequality exists. An index associated with the unequal element is stored in a target vector register. Further, the same instruction, the Find Element Not Equal instruction, also searches a selected vector for null elements, also referred to as zero elements. A result of the instruction is dependent on whether the null search is provided, or just the compare.
摘要翻译： 字符数据的处理方便。 一个查找元素提供不等式的指令，用于比较不等式的多个向量的数据，并提供不平等的指示，如果存在不等式。 与不等元素相关联的索引存储在目标向量寄存器中。 此外，相同的指令“Find Element Not Equal”（查找元素不相等）指令也会搜索所选向量的零元素，也称为零元素。 指令的结果取决于是否提供空搜索，还是只是比较。
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16.发明授权公开(公告)号：US09454367B2
公开(公告)日：2016-09-27
申请号：US13421640
申请日：2012-03-15
CPC分类号： G06F9/30018 , G06F9/30021 , G06F9/30036 , G06F9/30043
摘要： The length of character data having a termination character is determined. The character data for which the length is to be determined is loaded, in parallel, within one or more vector registers. An instruction is used that loads data in a vector register to a specified boundary, and provides a way to determine the number of characters loaded, using, for instance, another instruction. Further, an instruction is used to find the index of the first termination character, e.g., the first zero or null character. This instruction searches the data in parallel for the termination character. By using these instructions, the length of the character data is determined using only one branch instruction.
摘要翻译： 确定具有终止字符的字符数据的长度。 要确定长度的字符数据并行加载到一个或多个向量寄存器中。 使用将向量寄存器中的数据加载到指定边界的指令，并且提供了使用例如另一个指令来确定加载的字符数的方法。 此外，使用指令来找到第一终止字符的索引，例如，第一个零或空字符。 该指令并行搜索终止字符的数据。 通过使用这些指令，仅使用一个分支指令来确定字符数据的长度。
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公开(公告)号：US09286065B2
公开(公告)日：2016-03-15
申请号：US13421640
申请日：2012-03-15
摘要： The length of character data having a termination character is determined. The character data for which the length is to be determined is loaded, in parallel, within one or more vector registers. An instruction is used that loads data in a vector register to a specified boundary, and provides a way to determine the number of characters loaded, using, for instance, another instruction. Further, an instruction is used to find the index of the first termination character, e.g., the first zero or null character. This instruction searches the data in parallel for the termination character. By using these instructions, the length of the character data is determined using only one branch instruction.
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18.发明授权公开(公告)号：US09286064B2
公开(公告)日：2016-03-15
申请号：US13421498
申请日：2012-03-15
摘要： Copying characters of a set of terminated character data from one memory location to another memory location using parallel processing and without causing unwarranted exceptions. The character data to be copied is loaded within one or more vector registers. In particular, in one embodiment, an instruction (e.g., a Vector Load to block Boundary instruction) is used that loads data in parallel in a vector register to a specified boundary, and provides a way to determine the number of characters loaded. To determine the number of characters loaded (a count), another instruction (e.g., a Load Count to Block Boundary instruction) is used. Further, an instruction (e.g., a Vector Find Element Not Equal instruction) is used to find the index of the first delimiter character, i.e., the first termination character, such as a zero or null character within the character data. This instruction checks a plurality of bytes of data in parallel.
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公开(公告)号：US20140025928A1
公开(公告)日：2014-01-23
申请号：US13552108
申请日：2012-07-18
IPC分类号： G06F9/30
CPC分类号： G06F9/30185 , G06F9/30014 , G06F9/30098
摘要： Embodiments relate to reducing a number of read ports for register pairs. An aspect includes executing an instruction. The instruction identifies a pair of registers as containing a wide operand which spans the pair of registers. The executing of the instruction includes determining whether a pairing indicator associated with the pair of registers has a first value, a second value or a third value. Based on the pairing indicator having the first value, the wide operand is read from the wide register. Based on the pairing indicator having the second value the wide operand is read from the pair of registers. Based on the pairing indicator having the third value, the wide operand is speculatively read from a predetermined register. The predetermined register consists of the wide register or the pair of registers.
摘要翻译： 实施例涉及减少用于寄存器对的多个读端口。 一方面包括执行指令。 该指令将一对寄存器标识为包含跨越寄存器对的宽操作数。 指令的执行包括确定与该对寄存器相关联的配对指示符是否具有第一值，第二值或第三值。 基于具有第一值的配对指示符，从宽寄存器读取宽操作数。 基于具有第二值的配对指示符，从该对寄存器读取宽操作数。 基于具有第三值的配对指示符，从预定的寄存器推测地读取宽操作数。 预定寄存器由宽寄存器或寄存器对组成。
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公开(公告)号：US20130246751A1
公开(公告)日：2013-09-19
申请号：US13421442
申请日：2012-03-15
CPC分类号： G06F9/3001 , G06F9/30018 , G06F9/30021 , G06F9/30036 , G06F9/30047 , G06F9/30185 , G06F9/45516
摘要： Processing of character data is facilitated. A Find Element Not Equal instruction is provided that compares data of multiple vectors for inequality and provides an indication of inequality, if inequality exists. An index associated with the unequal element is stored in a target vector register. Further, the same instruction, the Find Element Not Equal instruction, also searches a selected vector for null elements, also referred to as zero elements. A result of the instruction is dependent on whether the null search is provided, or just the compare.
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