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公开(公告)号：US20130234261A1
公开(公告)日：2013-09-12
申请号：US13417337
申请日：2012-03-12
申请人： Ming-Te Wei , Shin-Chuan Huang , Yu-Hsiang Hung , Po-Chao Tsao , Chia-Jui Liang , Ming-Tsung Chen , Chia-Wen Liang
发明人： Ming-Te Wei , Shin-Chuan Huang , Yu-Hsiang Hung , Po-Chao Tsao , Chia-Jui Liang , Ming-Tsung Chen , Chia-Wen Liang
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L29/66492 , H01L29/165 , H01L29/6656 , H01L29/66636 , H01L29/7834 , H01L29/7848
摘要： A semiconductor structure includes a gate structure disposed on a substrate and having an outer spacer, a recess disposed in the substrate and adjacent to the gate structure, a doped epitaxial material filling up the recess, a cap layer including an undoped epitaxial material and disposed on the doped epitaxial material, a lightly doped drain disposed below the cap layer and sandwiched between the doped epitaxial material and the cap layer, and a silicide disposed on the cap layer and covering the doped epitaxial material to cover the cap layer together with the outer spacer without directly contacting the lightly doped drain.
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公开(公告)号：USD430924S
公开(公告)日：2000-09-12
申请号：US114166
申请日：1999-11-22
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13.发明申请METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE HAVING DUAL FULLY-SILICIDED GATE 审中-公开制造具有双重全硅酸盐的半导体器件的方法公开(公告)号：US20110294287A1
公开(公告)日：2011-12-01
申请号：US13208772
申请日：2011-08-12
申请人： Chin-Hsiang Lin , Chia-Jung Hsu , Li-Wei Cheng , Hsien-Liang Meng , Ming-Te Wei , Che-Hua Hsu
发明人： Chin-Hsiang Lin , Chia-Jung Hsu , Li-Wei Cheng , Hsien-Liang Meng , Ming-Te Wei , Che-Hua Hsu
IPC分类号： H01L21/263
CPC分类号： H01L21/823835 , H01L21/28097 , H01L29/4975 , H01L29/517 , H01L29/665 , H01L29/66545
摘要： A method of manufacturing the semiconductor device having a dual fully-silicided gate includes the following steps. A substrate having a first transistor and a second transistor formed thereon is provided, wherein the first transistor includes a first gate and a first source/drain and the second transistor includes a second gate and a second source/drain. The gate height of the first gate is different from that of the second gate. A first silicidation process is performed to respectively transform the first gate and the second gate into a first silicided gate and a second silicided gate simultaneously, wherein the material of the first silicided gate is different from that of the second silicided gate.
摘要翻译： 制造具有双全硅化物栅的半导体器件的方法包括以下步骤。 提供了具有形成在其上的第一晶体管和第二晶体管的衬底，其中所述第一晶体管包括第一栅极和第一源极/漏极，所述第二晶体管包括第二栅极和第二源极/漏极。 第一栅极的栅极高度与第二栅极的栅极高度不同。 执行第一硅化处理以分别将第一栅极和第二栅极转换成第一硅化栅极和第二硅化物栅极，其中第一硅化栅极的材料与第二硅化物栅极的材料不同。
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公开(公告)号：USD427666S
公开(公告)日：2000-07-04
申请号：US114218
申请日：1999-11-22
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公开(公告)号：USD427287S
公开(公告)日：2000-06-27
申请号：US114217
申请日：1999-11-22
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