公开(公告)号：US20080148125A1

公开(公告)日：2008-06-19

申请号：US11612350

申请日：2006-12-18

Applicant: Veerendra Bhora ,  Raghavan Sudhakar

Inventor： Veerendra Bhora ,  Raghavan Sudhakar

IPC: G06F11/10

CPC classification number: H04L1/0051 ,  H04L1/06

Abstract: Embodiments of an iterative decoder with early-exit condition detection and methods for decoding are generally described herein. Other embodiments may be described and claimed. In some embodiments, a first codeword is generated from decoded bits after one or more half-iterations of an iterative decoder, a second codeword from decoded bits after an additional half-iteration of the iterative decoder, and the first and second codewords are compared to determine whether the decoded bits are valid. In some embodiments, double or triple codeword matching is selected based on an estimated signal-to-noise ratio (SNR) and the modulation level.

Abstract translation: 具有早退条件检测的迭代解码器和解码方法的实施例在此通常被描述。 可以描述和要求保护其他实施例。 在一些实施例中，在迭代解码器的一个或多个半迭代之后从经解码的比特生成第一码字，在迭代解码器的附加半迭代之后的解码比特中的第二码字，并将第一和第二码字与 确定解码的比特是否有效。 在一些实施例中，基于估计的信噪比（SNR）和调制电平来选择双码或三码字匹配。

公开(公告)号：US20060143554A1

公开(公告)日：2006-06-29

申请号：US11022212

申请日：2004-12-23

Applicant: Raghavan Sudhakar ,  Ravi Kolagotla

Inventor： Raghavan Sudhakar ,  Ravi Kolagotla

IPC: H03M13/03

CPC classification number: H03M13/4169 ,  H03M13/4107 ,  H03M13/6502

Abstract: Apparatus, system, and method for scalable traceback techniques for channel decoding are described.

公开(公告)号：US20050157823A1

公开(公告)日：2005-07-21

申请号：US10761637

申请日：2004-01-20

Applicant: Raghavan Sudhakar

Inventor： Raghavan Sudhakar

IPC: H03D1/00 ,  H03M13/41

CPC classification number: H03M13/4107

Abstract: Optimizing a decoding algorithm used in various telecommunications protocols. Embodiments of the invention relate to a technique for decoding encoded data by reducing redundant calculations and memory accesses and better matching add-compare-select (ACS) operations with corresponding digital signal processing (DSP) instructions.

Abstract translation: 优化各种电信协议中使用的解码算法。 本发明的实施例涉及通过减少冗余计算和存储器访问以及更好地匹配加法比较选择（ACS）操作与对应的数字信号处理（DSP）指令来对编码数据进行解码的技术。