Abstract:
A buffer space allocation method for a packet switch includes periodically performing a measurement process to obtain a plurality of measurement results at different times, each measurement result indicating a total size of accumulated packets in an output queue corresponding to one of a plurality of network ports of the packet switch, and adjusting a dedicated buffer space of the output queue according to the plurality of measurement results and a reserved space value for the dedicated buffer space.
Abstract:
A method and a system for power saving and state retention in an electronic device are provided. The method for power saving and state retention in an electronic device includes recording a state variation of electronic components of a plurality of groups in a second circuit of the electronic device in a variation table stored in memory of a first circuit or the second circuit of the electronic device; before stopping providing power to the second circuit, selecting some groups from the plurality of groups according to the variation table and making a backup of states of electronic components of the selected groups; and after restoring power to the second circuit, restoring the states of electronic components of the selected groups according to states in the backup.
Abstract:
The present invention provides a packet-processing apparatus for receiving and processing N packets in a series, wherein N is a natural number, and each of the packets has a current header. Additionally, the packet-processing apparatus includes an agent, a processing unit, a monitoring unit, a lookup table, and a control unit. Particularly, the packet-processing apparatus according to the invention can process the N packets effectively and flexibly.
Abstract:
A method and a system for power saving and state retention in an electronic device are provided. The method for power saving and state retention in an electronic device includes recording a state variation of electronic components of a plurality of groups in a second circuit of the electronic device in a variation table stored in memory of a first circuit or the second circuit of the electronic device; before stopping providing power to the second circuit, selecting some groups from the plurality of groups according to the variation table and making a backup of states of electronic components of the selected groups; and after restoring power to the second circuit, restoring the states of electronic components of the selected groups according to states in the backup.
Abstract:
The present invention provides a packet-processing apparatus for receiving and processing N packets in a series, wherein N is a natural number, and each of the packets has a current header. Additionally, the packet-processing apparatus includes an agent, a processing unit, a monitoring unit, a lookup table, and a control unit. Particularly, the packet-processing apparatus according to the invention can process the N packets effectively and flexibly.
Abstract:
A flexible and high-performance packet classification algorithm. The algorithm includes converting the original rule database into rule mapping table format for storage. The method of producing the rule mapping table includes partitioning an input key into a plurality of sub-keys, and sequentially comparing various grouping combinations of each sub-key with the same sub-key field of each rule. Finally, the results are stored in the rule mapping table using a bit-map method. This invention provides a packet classification algorithm that support a plurality of rule databases or sub-tables such that the co-existence of a plurality of rule databases each having a different length and width in the same search engine is permitted. In addition, the design can provide actual improvements (higher speed, smaller volume occupation) and flexibility (possible coexistent of different rule databases). Moreover, the search method can be used as a general-purpose search engine in the design of network processor or in any situation when rapid search is necessary. The search method can serve even as a replacement technology for CAM.
Abstract:
A method for adjusting clock frequency of a processing unit of a computer system includes calculating a busyness ratio of the processing unit according to a status signal provided by the processing unit, determining whether the busyness ratio is in a busyness ratio range, when the busyness ratio is not in the busyness ratio range, determining whether a calculation result generated according to a clock frequency of the processing unit and a frequency difference is in a frequency range, and when the calculation result is in the frequency range, adjusting the clock frequency of the processing unit according to the calculation result and outputting the adjusted clock frequency to a clock generator, wherein the busyness ratio range, the frequency range and the frequency difference are decided according to an operation state of a peripheral unit of the computer system.
Abstract:
A biocidal polymer including at least one repeating unit of formula (A): wherein: R1 in each occurrence independently represents a divalent aromatic group containing 6 to 30 carbon atoms, a C2-C16 alkylene group or an alkylene biscyclohexyl; Y in each occurrence independently represents an oxygen atom or a sulfur atom; and Z1, Z2, Z3 and Z4 in each occurrence independently represent a hydrogen atom or a halogen atom; wherein at least one of Z1, Z2, Z3 and Z4 in the at least one repeating unit of formula (A) is a halogen atom.
Abstract:
A buffer space allocation method for a packet switch includes periodically performing a measurement process to obtain a plurality of measurement results at different times, each measurement result indicating a total size of accumulated packets in an output queue corresponding to one of a plurality of network ports of the packet switch, and adjusting a dedicated buffer space of the output queue according to the plurality of measurement results and a reserved space value for the dedicated buffer space.