公开(公告)号：US20100093994A1

公开(公告)日：2010-04-15

申请号：US12559666

申请日：2009-09-15

申请人： Jung-Hwan LEE ,  Hyun-Gu Kang ,  Sung-Ho Ryu ,  Jong-In Kim ,  Sun-Hak Lee ,  Hye-Jung Lee ,  Eun-Jung Jang

发明人： Jung-Hwan LEE ,  Hyun-Gu Kang ,  Sung-Ho Ryu ,  Jong-In Kim ,  Sun-Hak Lee ,  Hye-Jung Lee ,  Eun-Jung Jang

IPC分类号： C08B37/00

CPC分类号： C07H21/04 ,  Y02P20/55

摘要： A method for preparing amino linker oligonucleotides is provided, wherein an amino protecting group is efficiently removed from the amino linker oligonucleotides protected by the protecting group, and thereby achieving a high yield of the amino linker oligonucleotides.

摘要翻译： 提供了制备氨基接头寡核苷酸的方法，其中氨基保护基被有效地从保护基保护的氨基接头寡核苷酸中除去，从而达到高产量的氨基接头寡核苷酸。

公开(公告)号：US20090009434A1

公开(公告)日：2009-01-08

申请号：US12213936

申请日：2008-06-26

申请人： Yong-Don Kim ,  Joung-Ho Kim ,  Mueng-Ryul Lee ,  Yong-Chan Kim ,  Sun-Hak Lee

发明人： Yong-Don Kim ,  Joung-Ho Kim ,  Mueng-Ryul Lee ,  Yong-Chan Kim ,  Sun-Hak Lee

IPC分类号： G09G3/28 ,  H03K19/094 ,  G09G5/00

CPC分类号： G09G3/2965 ,  G09G3/293 ,  G09G3/296 ,  G09G2330/021 ,  G09G2330/028

摘要： An address driver includes an energy recovery circuit and an output stage connected to the energy recovery circuit. The output stage is connected to the energy recovery circuit and is formed of a pull-up MOS transistor and a pull-down MOS transistor in series. A source terminal of the pull-up MOS transistor is connected to the energy recovery circuit, and a bulk terminal of the pull-up MOS transistor is connected to a node providing a reverse bias between the source terminal and the bulk terminal of the pull-up MOS transistor. A display device employing the address driver is also provided.

摘要翻译： 地址驱动器包括能量恢复电路和连接到能量恢复电路的输出级。 输出级与能量恢复电路相连，由串联的上拉MOS晶体管和下拉式MOS晶体管构成。 上拉MOS晶体管的源极端子连接到能量恢复电路，并且上拉MOS晶体管的体式端子连接到在源极端子和拉出型MOS晶体管的体式端子之间提供反向偏置的节点， up MOS晶体管。 还提供了采用地址驱动器的显示装置。

公开(公告)号：US20080138946A1

公开(公告)日：2008-06-12

申请号：US12032377

申请日：2008-02-15

申请人： Sun-Hak Lee

发明人： Sun-Hak Lee

IPC分类号： H01L29/06

CPC分类号： H01L29/0847 ,  H01L21/823807 ,  H01L21/823814 ,  H01L27/0922 ,  H01L29/66659 ,  H01L29/7835

摘要： In a high frequency LDMOS transistor, a gate structure is formed on a substrate. A drain, doped with first type impurities at a first concentration, is formed on the substrate spaced apart from the gate structure. A buffer well, doped with the first type impurities at a second concentration lower than the first concentration, surrounds side and lower portions of the drain. A lightly doped drain, doped with the first type impurities at a third concentration lower than the second concentration, is formed between the buffer well and the gate structure. A source, doped with the first type impurities at the first concentration, is formed on the substrate adjacent to the gate structure and opposite to the drain with respect to the gate structure. Accordingly, an on-resistance decreases while a breakdown voltage increases in the LDMOS transistor without increasing a capacitance between the gate structure and the drain.

摘要翻译： 在高频LDMOS晶体管中，在衬底上形成栅极结构。 在与栅极结构间隔开的衬底上形成以第一浓度掺杂第一类型杂质的漏极。 掺杂有低于第一浓度的第二浓度的第一种杂质的缓冲阱包围漏极的侧部和下部。 在缓冲阱和栅极结构之间形成掺杂有低于第二浓度的第三浓度的第一种杂质的轻掺杂漏极。 掺杂有第一浓度的第一类型杂质的源极相对于栅极结构形成在与栅极结构相邻并且与漏极相对的衬底上。 因此，在不增加栅极结构和漏极之间的电容的情况下，导通电阻随着LDMOS晶体管中的击穿电压增加而减小。

公开(公告)号：US06867476B2

公开(公告)日：2005-03-15

申请号：US10396348

申请日：2003-03-26

申请人： Sun-Hak Lee

发明人： Sun-Hak Lee

IPC分类号： H01L21/336 ,  H01L29/06 ,  H01L29/08 ,  H01L29/78 ,  H01L29/00

CPC分类号： H01L29/66712 ,  H01L29/0696 ,  H01L29/0847 ,  H01L29/7809

摘要： In a DMOS device, a drift region is located over a substrate and is lightly doped with impurities of a first conductivity type. A plurality of body areas are located in the drift region and doped with impurities of a second conductivity type which is opposite the first conductivity type. A plurality of source areas are respectively located in the body areas and heavily doped with impurities of the first conductivity type. A plurality of bulk areas are respectively located adjacent the source areas and in the body areas, and are heavily doped with impurities of the second conductivity type. A well region partially surrounds the body areas collectively and is doped with impurities of the first conductivity.

摘要翻译： 在DMOS器件中，漂移区位于衬底上并且轻掺杂有第一导电类型的杂质。 多个体区位于漂移区中，并掺杂有与第一导电类型相反的第二导电类型的杂质。 多个源区分别位于体区，并且重掺杂有第一导电类型的杂质。 多个体积区域分别位于源区域和身体区域中，并且重掺杂有第二导电类型的杂质。 阱区部分地围绕身体区域并且掺杂有第一导电性的杂质。