Organic Light Emitting Diode Display Device and Driving Method Thereof
    11.
    发明申请
    Organic Light Emitting Diode Display Device and Driving Method Thereof 有权
    有机发光二极管显示装置及其驱动方法

    公开(公告)号:US20150325174A1

    公开(公告)日:2015-11-12

    申请号:US14710327

    申请日:2015-05-12

    Abstract: An organic light emitting diode display device is disclosed which includes: a scan switch controlled by a scan pulse on a gate line and connected between a data line and a first node; a driving switch which includes a gate electrode connected to the first node, a source electrode connected to a second node, and a drain electrode connected to a first driving voltage line; a sensing switch controlled by a sensing control signal and connected between the second node and a third node on a sensing line; and an organic light emitting diode connected between the second node and a second driving voltage line.

    Abstract translation: 公开了一种有机发光二极管显示装置,其包括:由栅极线上的扫描脉冲控制并连接在数据线与第一节点之间的扫描开关; 驱动开关,其包括连接到第一节点的栅电极,连接到第二节点的源电极和连接到第一驱动电压线的漏电极; 感测开关由感测控制信号控制并连接在感测线上的第二节点和第三节点之间; 以及连接在第二节点和第二驱动电压线之间的有机发光二极管。

    DISPLAY APPARATUS AND DRIVING METHOD THEREOF
    12.
    发明公开

    公开(公告)号:US20240221681A1

    公开(公告)日:2024-07-04

    申请号:US18513998

    申请日:2023-11-20

    Abstract: A display apparatus includes a display panel configured to display an image, a gate driver configured to supply gate signals to the display panel, a timing controller configured to control the gate driver; and a memory controlled by the timing controller, wherein the timing controller performs masking so that the gate signals are not output when a resolution of the image to be input is changed to a second resolution which is lower than a first resolution, and calculates a driving compensation value to display the image with the second resolution during a resolution change period.

    DISPLAY APPARATUS AND DRIVING METHOD THEREOF
    13.
    发明公开

    公开(公告)号:US20240221680A1

    公开(公告)日:2024-07-04

    申请号:US18507987

    申请日:2023-11-13

    CPC classification number: G09G3/3266 G09G2310/08 G09G2340/0407

    Abstract: A display apparatus includes a display panel configured to display an image, a gate driver configured to supply gate signals to the display panel, a timing controller configured to control an output pattern of the gate driver so that the gate signals are applied one by one per one gate line or are applied one by one per two gate lines, based on an image input from the outside, and a resolution resizer configured to change at least one of a horizontal resolution and a vertical resolution, based on the image input from the outside.

    TILING DISPLAY APPARATUS
    14.
    发明公开

    公开(公告)号:US20240177686A1

    公开(公告)日:2024-05-30

    申请号:US18436104

    申请日:2024-02-08

    CPC classification number: G09G5/003 G06F3/1446 G09G2370/045

    Abstract: A tiling display apparatus includes a set board configured to generate a control command signal and a plurality of display modules connected to one another through a first interface circuit based on a serial communication scheme, for executing a target operation corresponding to the control command signal, and the first interface circuit is implemented with a bidirectional serial interface having a feedback loop type between adjacent display modules of the plurality of display modules.

    TILING DISPLAY APPARATUS
    15.
    发明公开

    公开(公告)号:US20230215345A1

    公开(公告)日:2023-07-06

    申请号:US17984928

    申请日:2022-11-10

    CPC classification number: G09G3/32 G09G2310/08 G09G2300/026

    Abstract: A tiling display apparatus includes a plurality of display modules connected to one another to configure a screen, a set board configured to output an input data enable signal and image data synchronized therewith to one of the plurality of display modules, and first to Nth (where N is a natural number of 3 or more) timing controllers configured for the plurality of display modules, the first to Nth timing controllers are sequentially connected to one another in a first direction through a first interface line based on a cascading scheme and configured to receive the input data enable signal and the image data at different timings which are sequentially delayed and synchronize a display time of the image data on the basis of an independently generated output data enable signal.

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