Scalable Boundary Clock
    11.
    发明公开

    公开(公告)号:US20230367358A1

    公开(公告)日:2023-11-16

    申请号:US17867779

    申请日:2022-07-19

    CPC classification number: G06F1/12 G06F1/10 G06F1/06

    Abstract: In one embodiment, a synchronized communication system includes a first network device and a second network device, wherein the first network device includes a first physical hardware clock, and is configured to recover a reference clock time from packets received from a remote clock, find a clock differential between a clock time output by the first physical hardware clock and the recovered reference clock time, provide a control signal to the second network device responsively to the clock differential, and the second network device includes a second physical hardware clock, and is configured to adjust a clock time output by the second physical hardware clock responsively to the control signal.

    Software-controlled clock synchronization of network devices

    公开(公告)号:US20220191275A1

    公开(公告)日:2022-06-16

    申请号:US17120313

    申请日:2020-12-14

    Abstract: A synchronized communication system includes a plurality of network communication devices, one of which is designated as a root device and the others designated as slave devices. Each network communication device includes one or more ports and communications circuitry, which processes the communication signals received by the one or more ports so as to recover a respective remote clock from each of the signals. A synchronization circuit is integrated in the root device and provides a root clock signal, which is conveyed by clock links to the slave devices. A host processor selects one of the ports of one of the network communication devices to serve as a master port, finds a clock differential between the root clock signal and the respective remote clock recovered from the master port, and outputs, responsively to the clock differential, a control signal causing the synchronization circuit to adjust the root clock signal.

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