中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

69 records (took 0.035 seconds)

    Power-optimized and shared buffer
    1.
    发明授权
    Power-optimized and shared buffer 有权

    公开(公告)号：US12229439B1

    公开(公告)日：2025-02-18

    申请号：US18229509

    申请日：2023-08-02

    Applicant: MELLANOX TECHNOLOGIES, LTD.

    Inventor： Niv Aibester ,  Eyal Srebro ,  Liron Mula ,  Amit Kazimirsky

    IPC: G06F3/06 ,  G06F1/3234 ,  H04L49/90

    Abstract: A network device, a network interface controller, and a switch are provided. In one example, a shared buffer includes a plurality of cells of memory, one or more ports read data from the shared buffer and write data to the shared buffer, and a controller circuit selectively enables and disables cells of memory of the shared buffer based on an amount of data stored in the shared buffer. Power consumption of the shared buffer is in proportion to a number of enabled cells of memory.

    TIMESTAMP CONTROL LOOP
    2.
    发明申请
    TIMESTAMP CONTROL LOOP 有权

    公开(公告)号：US20250047402A1

    公开(公告)日：2025-02-06

    申请号：US18229074

    申请日：2023-08-01

    Applicant: Mellanox Technologies, Ltd.

    Inventor： Yam Gellis ,  Oren Matus ,  Liron Mula ,  Natan Manevich ,  Hillel Chapman ,  Dotan David Levi

    IPC: H04J3/06

    Abstract: A device includes a receiver including a timestamp generator to update timestamps at a first rate. The receiver is to estimate a first time for receiving a signal, wherein the signal is associated with a synchronization operation. The receiver is further to receive the signal at a second time. The receiver is further to determine a difference between the second time and the first time, wherein the difference is associated with an error of the timestamp generator of the receiver. The receiver can also adjust the first rate to a second rate at which to update the timestamps by the timestamp generator, responsive to determining the difference between the first time and the second time.

    ETHERNET PAUSE AGGREGATION FOR A RELAY DEVICE
    4.
    发明公开
    ETHERNET PAUSE AGGREGATION FOR A RELAY DEVICE 审中-公开

    公开(公告)号：US20240089211A1

    公开(公告)日：2024-03-14

    申请号：US18509810

    申请日：2023-11-15

    Applicant: MELLANOX TECHNOLOGIES, LTD.

    Inventor： Liron Mula ,  Zachy Haramaty ,  Shachar Bar Tikva ,  Dekel Dadon

    IPC: H04L47/32 ,  H04L47/30

    CPC classification number: H04L47/32 ,  H04L47/30

    Abstract: A relay device is provided that may identify a quantity of empty data byte locations in a data buffer of the relay device. The relay device may receive an indicator associated with transmitting data packets. The relay device may pause or enable a lossless flow of data between the relay device, a host device, and a peer device based on the quantity of empty data byte locations, the indicator, or both. The relay device may include a first data interface coupled with a peer device, a second data interface coupled with a host device, a data buffer configured to store data packets received from the host device, and a state machine that enables a lossless transmission of data between the host device and peer device. The state machine may transmit a pause frame to the host device based on a data buffer utilization reaching a data storage capacity.

    ETHERNET PAUSE AGGREGATION FOR A RELAY DEVICE
    7.
    发明申请
    ETHERNET PAUSE AGGREGATION FOR A RELAY DEVICE 有权

    公开(公告)号：US20230047454A1

    公开(公告)日：2023-02-16

    申请号：US17398677

    申请日：2021-08-10

    Applicant: MELLANOX TECHNOLOGIES, LTD.

    Inventor： Liron Mula ,  Zachy Haramaty ,  Shachar Bar Tikva ,  Dekel Dadon

    IPC: H04L12/823 ,  H04L12/835

    Abstract: A relay device is provided that may identify a quantity of empty data byte locations in a data buffer of the relay device. The relay device may receive an indicator associated with transmitting data packets. The relay device may pause or enable a lossless flow of data between the relay device, a host device, and a peer device based on the quantity of empty data byte locations, the indicator, or both. The relay device may include a first data interface coupled with a peer device, a second data interface coupled with a host device, a data buffer configured to store data packets received from the host device, and a state machine that enables a lossless transmission of data between the host device and peer device. The state machine may transmit a pause frame to the host device based on a data buffer utilization reaching a data storage capacity.

    Efficient parsing tuned to prevalent packet types
    8.
    发明授权
    Efficient parsing tuned to prevalent packet types 有权

    公开(公告)号：US11425230B2

    公开(公告)日：2022-08-23

    申请号：US17160407

    申请日：2021-01-28

    Applicant: Mellanox Technologies, Ltd.

    Inventor： Liron Mula ,  Aviv Kfir ,  Amir Mizrahi ,  Niv Aibester

    IPC: H04L49/354 ,  H04L49/90 ,  H04L69/22 ,  H04L69/12

    Abstract: A parsing apparatus includes an interface, a first parser, a second parser and a controller. The interface is configured to receive packets belonging to a plurality of predefined packet types. The first parser is configured to identify any of the packet types. The second parser is configured to identify only a partial subset of the packet types. The controller is configured to receive a packet via the interface, to attempt identifying a packet type of the received packet using the second parser, and in response to detecting that identifying the packet type using the second parser fails, to revert to identify the packet type of the received packet using the first parser.

    METHODS AND SYSTEMS FOR ERROR-CORRECTION DECODING
    9.
    发明申请
    METHODS AND SYSTEMS FOR ERROR-CORRECTION DECODING 有权
    用于错误修正解码的方法和系统

    公开(公告)号：US20140281840A1

    公开(公告)日：2014-09-18

    申请号：US13839193

    申请日：2013-03-15

    Applicant: MELLANOX TECHNOLOGIES LTD.

    Inventor： Liron Mula ,  Ran Ravid ,  Chen Gaist ,  Omer Sela ,  Oren Tzvi Sela

    IPC: H03M13/15

    CPC classification number: H03M13/1515 ,  H03M13/153 ,  H03M13/1575 ,  H03M13/3715

    Abstract: Methods and systems for efficient Reed-Solomon (RS) decoding are provided. The RS decoding unit includes both an RS pseudo decoder and an RS decoder. The RS pseudo decoder is configured to correct a small number of errors in a received codeword, while the RS decoder is configured to correct errors that are recoverable by the RS code. The RS pseudo decoder runs in parallel with the RS decoder. Once the RS pseudo decoder successfully decodes the codeword, the RS decoder may stop its processing, thereby reducing the RS decoding latency.

    Abstract translation: 提供了有效的里德 - 所罗门（RS）解码的方法和系统。 RS解码单元包括RS伪解码器和RS解码器。 RS伪解码器被配置为校正接收到的码字中的少量错误，而RS解码器被配置为校正可由RS码恢复的错误。 RS伪解码器与RS解码器并行运行。 一旦RS伪解码器成功解码码字，则RS解码器可能停止其处理，从而降低RS解码延迟。

Patent Agency Ranking