公开(公告)号：US12088712B2

公开(公告)日：2024-09-10

申请号：US17699517

申请日：2022-03-21

Applicant: Mellanox Technologies Ltd.

Inventor： Eitan Hirshberg ,  Boris Pismenny ,  Miriam Menes ,  Eilon Greenstein

IPC: H04L9/08

CPC classification number: H04L9/0891 ,  H04L9/0822

Abstract: A method of encrypting a memory transaction include, using a computing device operating a processor, encrypting a set of buffers to be transmitted, each buffer encrypted using an encryption key of a set of encryption keys.

公开(公告)号：US20240097876A1

公开(公告)日：2024-03-21

申请号：US18523991

申请日：2023-11-30

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Dotan David Levi ,  Ariel Shahar ,  Shahaf Shuler ,  Ariel Almog ,  Eitan Hirshberg ,  Natan Manevich

IPC: H04L7/00

CPC classification number: H04L7/0091

Abstract: A communication system includes at least one send queue, containing send queue entries pointing to packets to be transmitted over a network by packet sending circuitry. A clock work queue contains clock queue entries to synchronize sending times of the packets pointed to by the send queue entries. At least one arming queue contains arming queue entries to arm the clock work queue at selected time intervals.

公开(公告)号：US20220394081A1

公开(公告)日：2022-12-08

申请号：US17338081

申请日：2021-06-03

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Ron Yuval Efraim ,  Yamin Friedman ,  Eitan Hirshberg

IPC: H04L29/08 ,  H04L12/24

Abstract: A system which facilitates efficient operation of plural agents, the system comprising a device which services the plural agents; and functionality which resides on the device and which provides a given quality of service, defined in terms of at least one resource, to at least one subset of agents from among the plural agents.

公开(公告)号：US10824469B2

公开(公告)日：2020-11-03

申请号：US16202132

申请日：2018-11-28

Applicant: Mellanox Technologies, Ltd.

Inventor： Eitan Hirshberg ,  Ariel Shahar ,  Najeeb Darawshy ,  Omri Kahalon

IPC: G06F9/48 ,  G06F9/38 ,  G06F9/30

Abstract: A computer system includes one or more processors, one or more hardware accelerators, and control circuitry. The processors are configured to run software that executes tasks in a normal mode. The accelerators are configured to execute the tasks in an accelerated mode. The control circuitry is configured to receive one or more flows of tasks for execution by the processors and the accelerators, assign one or more initial tasks of each flow for execution by the processors, assign subsequent tasks of each flow for execution by the accelerators, and verify, for each flow, that the accelerators do not execute the subsequent tasks of the flow until the processors have fully executed the initial tasks of the flow.

公开(公告)号：US09032010B2

公开(公告)日：2015-05-12

申请号：US13664428

申请日：2012-10-31

Applicant: Mellanox Technologies Ltd.

Inventor： Eitan Hirshberg

IPC: G06F7/52 ,  G06F7/535

CPC classification number: G06F7/535 ,  G06F2207/5355

Abstract: A method includes receiving a dividend and a divisor for performing a division operation. Numbers p and n are found, for which the divisor equals 2n(1+2p). An interim result, which is equal to a reciprocal of 1+2p multiplied by the dividend, is calculated. The interim result is divided by 2n to produce a result of the division operation.

Abstract translation: 一种方法包括接收用于执行除法运算的除数和除数。 数字p和n被找到，除数等于2n（1 + 2p）。 计算等于1 + 2p的乘数乘以除数的中间结果。 中间结果除以2n以产生除法运算的结果。