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    Processor with conditional-fence commands excluding designated memory regions
    3.
    发明授权
    Processor with conditional-fence commands excluding designated memory regions 有权

    公开(公告)号：US11580036B1

    公开(公告)日：2023-02-14

    申请号：US17385962

    申请日：2021-07-27

    Applicant: MELLANOX TECHNOLOGIES, LTD.

    Inventor： Ilan Pardo ,  Shahaf Shuler ,  George Elias ,  Nizan Atias ,  Adi Maymon

    IPC: G06F12/14 ,  G06F9/30 ,  G06F12/02

    Abstract: An apparatus includes a processor, configured to designate a memory region in a memory, and to issue (i) memory-access commands for accessing the memory and (ii) a conditional-fence command associated with the designated memory region. Memory-Access Control Circuitry (MACC) is configured, in response to identifying the conditional-fence command, to allow execution of the memory-access commands that access addresses within the designated memory region, and to defer the execution of the memory-access commands that access addresses outside the designated memory region, until completion of all the memory-access commands that were issued before the conditional-fence command.

    DISTRIBUTION OF MESSAGES TO QUEUES IN A DISTRIBUTED COMPUTING ENVIRONMENT
    4.
    发明申请
    DISTRIBUTION OF MESSAGES TO QUEUES IN A DISTRIBUTED COMPUTING ENVIRONMENT 审中-公开

    公开(公告)号：US20180183895A1

    公开(公告)日：2018-06-28

    申请号：US15390558

    申请日：2016-12-26

    Applicant: Mellanox Technologies Ltd.

    Inventor： Shahaf Shuler ,  Noam Bloch ,  Yossef Itigin

    IPC: H04L29/08 ,  G06F9/54

    CPC classification number: H04L67/32 ,  G06F9/546 ,  G06F2209/548

    Abstract: A network adapter includes a network interface and circuitry. The network interface is assigned a single network address in a communication network, and is configured to receive, from one or more other nodes over the communication network, messages that are destined for processing by multiple threads in one or more processing cores of a network node including the network adapter, but are nevertheless addressed to the single network address. The circuitry is configured to hold a distribution rule for distributing the messages among multiple Receive Queues (RQs) that are accessible by the threads, and to select for each message received via the network interface a respective RQ, by applying the distribution rule to the message.

    Hybrid tag matching
    5.
    发明授权
    Hybrid tag matching 有权

    公开(公告)号：US09742855B2

    公开(公告)日：2017-08-22

    申请号：US14834443

    申请日：2015-08-25

    Applicant: Mellanox Technologies Ltd.

    Inventor： Shahaf Shuler ,  Noam Bloch ,  Ofer Hayut ,  Richard Graham ,  Ariel Shahar ,  Yossef Itigin

    IPC: H04L29/08 ,  H04L29/06 ,  H04L12/861

    CPC classification number: H04L67/26 ,  H04L49/9068 ,  H04L67/10 ,  H04L67/1093 ,  H04L67/1097 ,  H04L69/06

    Abstract: A method for communication includes posting, by a software process, a set of buffers in a memory of a host processor and creating in the memory a list of labels associated respectively with the buffers. The software process pushes a first part of the list to a network interface controller (NIC), while retaining a second part of the list in the memory under control of the software process. Upon receiving a message containing a label, sent over a network, the NIC compares the label to the labels in the first part of the list and, upon finding a match to the label, writes data conveyed by the message to a buffer in the memory. Upon a failure to find the match in the first part of the list, the NIC passes the message from the NIC to the software process for handling using the second part of the list.

    Efficient and flexible flow inspector
    8.
    发明公开
    Efficient and flexible flow inspector 审中-公开

    公开(公告)号：US20230328032A1

    公开(公告)日：2023-10-12

    申请号：US17714207

    申请日：2022-04-06

    Applicant: MELLANOX TECHNOLOGIES, LTD.

    Inventor： Chen Rozenbaum ,  Shaul Arazi ,  Shahaf Shuler ,  Gary Mataev

    IPC: H04L9/40 ,  H04L69/22

    CPC classification number: H04L63/0236 ,  H04L63/0263 ,  H04L63/20 ,  H04L69/22

    Abstract: In one embodiment, a data communication device includes a network interface controller to process packets received from at least one of a host device for sending over a network, and at least one remote device over the network, at least one processor to execute computer instructions to receive a configuration, and extract filtering rules from the configuration, and at least one hardware accelerator to receive the filtering rules from the at least one processor, and filter the packets based on the rules so that some of the packets are dropped and some of the packets are forwarded to the at least one processor to send data based on the forwarded packets to another device.

    In-node aggregation and disaggregation of MPI alltoall and alltoallv collectives
    10.
    发明授权
    In-node aggregation and disaggregation of MPI alltoall and alltoallv collectives 有权

    公开(公告)号：US10521283B2

    公开(公告)日：2019-12-31

    申请号：US15446004

    申请日：2017-03-01

    Applicant: Mellanox Technologies, Ltd.

    Inventor： Shahaf Shuler ,  Noam Bloch ,  Gil Bloch

    IPC: G06F9/54

    Abstract: An MPI collective operation carried out in a fabric of network elements by transmitting MPI messages from all the initiator processes in an initiator node to designated ones of the responder processes in respective responder nodes. Respective payloads of the MPI messages are combined in a network interface device of the initiator node to form an aggregated MPI message. The aggregated MPI message is transmitted through the fabric to network interface devices of responder nodes, disaggregating the aggregated MPI message into individual messages, and distributing the individual messages to the designated responder node processes.

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