DRIVER CIRCUIT EQUIPPED WITH POWER GATING CIRCUIT

    公开(公告)号:US20200321038A1

    公开(公告)日:2020-10-08

    申请号:US16374613

    申请日:2019-04-03

    Inventor: Mieko Kojima

    Abstract: Disclosed herein is an apparatus that includes a first buffer circuit, a plurality of first driver circuits configured to drive the first buffer circuit, and a plurality of first switch circuits configured to supply an operation voltage to the first driver circuits, respectively. The first driver circuits are collectively arranged in a first region in a matrix, and the first switch circuits are collectively arranged in a second region different from the first region.

    WIRING WITH EXTERNAL TERMINAL
    12.
    发明申请

    公开(公告)号:US20180364797A1

    公开(公告)日:2018-12-20

    申请号:US16105599

    申请日:2018-08-20

    Inventor: Mieko Kojima

    Abstract: Apparatuses in data input/output circuits of a semiconductor device are described. An example apparatus includes an output driver and a pre-output driver. The pre-output driver includes: an output terminal coupled to the output driver and provides an output signal to the output driver; an output stage that receives a data signal and provides the output signal to the output terminal responsive, at least in part, to the data signal; and a slew rate control stage coupled to the output stage and controls a current flowing through the output stage. The output stage is disposed between the slew rate control stage and the output terminal.

    WIRING WITH EXTERNAL TERMINAL
    13.
    发明申请

    公开(公告)号:US20180364796A1

    公开(公告)日:2018-12-20

    申请号:US15628543

    申请日:2017-06-20

    Inventor: Mieko Kojima

    Abstract: Apparatuses in data input/output circuits of a semiconductor device are described. An example apparatus includes an output driver and a pre-output driver. The pre-output driver includes: an output terminal coupled to the output driver and provides an output signal to the output driver; an output stage that receives a data signal and provides the output signal to the output terminal responsive, at least in part, to the data signal; and a slew rate control stage coupled to the output stage and controls a current flowing through the output stage. The output stage is disposed between the slew rate control stage and the output terminal.

    Wiring with external terminal
    14.
    发明授权

    公开(公告)号:US10020252B2

    公开(公告)日:2018-07-10

    申请号:US15344211

    申请日:2016-11-04

    Abstract: Apparatuses for providing external terminals of a semiconductor device are described. An example apparatus includes: a pad formation area including a plurality of pads disposed at an edge of the apparatus; a peripheral circuit area including a plurality of circuit blocks coupled to a memory cell array, each circuit block of the plurality of circuit blocks including a via disposed at a side opposite to the pad formation area with respect to each circuit block; and a plurality of conductors, each conductor coupling the via to the corresponding pad, and crossing over, at least in part, an area in the peripheral circuit area that is outside the circuit block comprising the via.

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