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11.
公开(公告)号:US20110148887A1
公开(公告)日:2011-06-23
申请号:US12908308
申请日:2010-10-20
申请人: Lai Kuan Chong , Lai Guan Tang
发明人: Lai Kuan Chong , Lai Guan Tang
IPC分类号: G06T1/00
CPC分类号: G06T1/00
摘要: An example of a controller circuit may include a policy module to generate a power reduction policy output based on a processor power state input. The power reduction policy output may also be generated based on a graphics render engine idleness input. The circuit can also include a clock masking cell to apply a clock masking configuration to a graphics render clock trunk based on the power reduction policy output.
摘要翻译: 控制器电路的示例可以包括:策略模块,用于基于处理器功率状态输入生成功率降低策略输出。 还可以基于图形渲染引擎空闲输入来生成功率降低策略输出。 电路还可以包括时钟屏蔽单元,以基于功率降低策略输出将时钟屏蔽配置应用于图形渲染时钟中继。
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12.
公开(公告)号:US08780121B2
公开(公告)日:2014-07-15
申请号:US12908308
申请日:2010-10-20
申请人: Lai Kuan Chong , Lai Guan Tang
发明人: Lai Kuan Chong , Lai Guan Tang
CPC分类号: G06T1/00
摘要: An example of a controller circuit may include a policy module to generate a power reduction policy output based on a processor power state input. The power reduction policy output may also be generated based on a graphics render engine idleness input. The circuit can also include a clock masking cell to apply a clock masking configuration to a graphics render clock trunk based on the power reduction policy output.
摘要翻译: 控制器电路的示例可以包括:策略模块,用于基于处理器功率状态输入生成功率降低策略输出。 还可以基于图形渲染引擎空闲输入来生成功率降低策略输出。 电路还可以包括时钟屏蔽单元,以基于功率降低策略输出将时钟屏蔽配置应用于图形渲染时钟中继。
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