Signal regenerator for binary signals
    11.
    发明授权
    Signal regenerator for binary signals 失效
    信号再生器用于二进制信号

    公开(公告)号:US5602871A

    公开(公告)日:1997-02-11

    申请号:US152642

    申请日:1993-11-16

    申请人: Werner Scholz

    发明人: Werner Scholz

    CPC分类号: H04L25/20

    摘要: A signal regenerator for binary signals includes a signal equalizer having an input filter and an integrator. An amplitude detector and a period detector are arranged to receive the output signal of the equalizer. A high pass filter is included in a feedback loop to feed the output signal of one of the detectors back to the equalizer.

    摘要翻译: 用于二进制信号的信号再生器包括具有输入滤波器和积分器的信号均衡器。 布置振幅检测器和周期检测器以接收均衡器的输出信号。 反馈回路中包括高通滤波器,将一个检测器的输出信号反馈给均衡器。

    MODULAR MAGNETORESISTIVE MEMORY
    12.
    发明申请
    MODULAR MAGNETORESISTIVE MEMORY 有权
    模块化磁记忆

    公开(公告)号:US20110007558A1

    公开(公告)日:2011-01-13

    申请号:US12881072

    申请日:2010-09-13

    IPC分类号: G11C11/00

    摘要: A magnetoresistive memory element is provided with a read module having a first pinned layer with a magnetoresistance that is readable by a read current received from an external circuit. A write module has a nanocontact that receives a write current from the external circuit and, in turn, imparts a spin torque to a free layer that functions as a shared storage layer for both the read module and the write module.

    摘要翻译: 磁阻存储元件设置有读取模块,该读取模块具有可由从外部电路接收的读取电流读取的具有磁阻的第一固定层。 写入模块具有接收来自外部电路的写入电流的纳米接触,并且进而将自旋转矩赋予用作读取模块和写入模块的共享存储层的自由层。

    Modular magnetoresistive memory
    13.
    发明授权
    Modular magnetoresistive memory 有权
    模块化磁阻存储器

    公开(公告)号:US07795696B2

    公开(公告)日:2010-09-14

    申请号:US11969248

    申请日:2008-01-04

    IPC分类号: H01L29/82 G11C11/02

    摘要: A magnetoresistive memory element has a read module with a first pinned layer that has a magnetoresistance that is readable by a read current received from an external circuit. The element has a write module that receives a write current from the external circuit. A coupling module adjacent both the write module and the read module has a free layer that functions as a shared storage layer for both the read module and the write module. The shared storage layer receives spin torque from both the read module and the write module and has a magnetization that is rotatable by the write current.

    摘要翻译: 磁阻存储元件具有读取模块,其具有第一固定层,该第一固定层具有可由从外部电路接收的读取电流读取的磁阻。 该元件具有从外部电路接收写入电流的写入模块。 与写入模块和读取模块相邻的耦合模块具有用作读取模块和写入模块的共享存储层的自由层。 共享存储层从读取模块和写入模块接收自旋扭矩,并且具有可由写入电流旋转的磁化。

    MODULAR MAGNETORESISTIVE MEMORY
    15.
    发明申请
    MODULAR MAGNETORESISTIVE MEMORY 有权
    模块化磁记忆

    公开(公告)号:US20090067225A1

    公开(公告)日:2009-03-12

    申请号:US11969248

    申请日:2008-01-04

    IPC分类号: G11C11/02

    摘要: A magnetoresistive memory element has a read module with a first pinned layer that has a magnetoresistance that is readable by a read current received from an external circuit. The element has a write module that receives a write current from the external circuit. A coupling module adjacent both the write module and the read module has a free layer that functions as a shared storage layer for both the read module and the write module. The shared storage layer receives spin torque from both the read module and the write module and has a magnetization that is rotatable by the write current.

    摘要翻译: 磁阻存储元件具有读取模块,其具有第一固定层,该第一固定层具有可由从外部电路接收的读取电流读取的磁阻。 该元件具有从外部电路接收写入电流的写入模块。 与写入模块和读取模块相邻的耦合模块具有用作读取模块和写入模块的共享存储层的自由层。 共享存储层从读取模块和写入模块接收自旋扭矩,并且具有可由写入电流旋转的磁化。

    Data storage system with field assist source
    16.
    发明申请
    Data storage system with field assist source 审中-公开
    具有现场辅助源的数据存储系统

    公开(公告)号:US20080117545A1

    公开(公告)日:2008-05-22

    申请号:US11602059

    申请日:2006-11-20

    IPC分类号: G11B5/127

    摘要: A system including a recording head that includes a magnetic pole and a field assist source positioned adjacent the magnetic pole. The system further includes a recording medium positioned adjacent the recording head. In one aspect, the recording medium includes a magnetic recording layer wherein the magnetic recording layer has a damping value in the range of about 0.01 to about 0.20. In another aspect, the magnetic pole applies a write field to the recording medium at an angle in the range of about 15 degrees to about 30 degrees from an anisotropic axis of the magnetic recording layer and the field assist source applies a write assist field substantially in a plane perpendicular to the anisotropic axis of the magnetic recording layer. In another aspect, the field assist source has a spatial extent of about 12 nm to about 30 nm. In another aspect, the field assist source applies a circularly polarized write assist field substantially in a plane perpendicular to the anisotropic axis of the magnetic recording layer.

    摘要翻译: 一种包括记录头的系统,包括磁极和位于磁极附近的场辅助源。 该系统还包括位于记录头附近的记录介质。 在一个方面,记录介质包括磁记录层,其中磁记录层的阻尼值在约0.01至约0.20的范围内。 在另一方面,磁极以与磁记录层的各向异性轴成约15度至约30度的范围的角度向记录介质施加写入场,并且场辅助源施加基本上在 垂直于磁记录层的各向异性轴的平面。 在另一方面,场辅助源具有约12nm至约30nm的空间范围。 在另一方面,场辅助源基本上在垂直于磁记录层的各向异性轴的平面中施加圆偏振写入辅助场。

    Ampere wire write head with confined magnetic fields
    17.
    发明授权
    Ampere wire write head with confined magnetic fields 有权
    安培有线写磁头与限制磁场

    公开(公告)号:US07212367B2

    公开(公告)日:2007-05-01

    申请号:US10869444

    申请日:2004-06-16

    IPC分类号: G11B5/02 G11B5/187

    CPC分类号: G11B5/315 G11B5/127 G11B5/187

    摘要: A magnetic recording head comprises a write pole having a tip adjacent to an air bearing surface of the recording head, a return pole magnetically coupled to the write pole, a conductor positioned adjacent to an edge of the write pole at the air bearing surface, a first conductive heat sink connected to the conductor, and a second conductive heat sink connected to the conductor, wherein at least a portion of each of the first and second conductive heat sinks is positioned adjacent to the air bearing surface and wherein each of the first and second conductive heat sinks includes a structure for augmenting confinement of a magnetic write field adjacent to the write pole. Magnetic storage devices that include the magnetic recording head are also included.

    摘要翻译: 磁记录头包括具有与记录头的空气轴承表面相邻的尖端的写入磁极,磁极耦合到写入极的返回磁极,与空气轴承表面上的写入极的边缘相邻定位的导体, 连接到所述导体的第一导电散热器和连接到所述导体的第二导电散热器,其中所述第一和第二导电散热器中的每一个的至少一部分被定位成邻近所述空气轴承表面,并且其中, 第二导电散热器包括用于增加与写入极相邻的磁写入场的约束的结构。 还包括包括磁记录头的磁存储装置。

    Playback device for a digital signal recorded by a plurality of heads
    18.
    发明授权
    Playback device for a digital signal recorded by a plurality of heads 失效
    用于由多个头记录的数字信号的播放装置

    公开(公告)号:US4636875A

    公开(公告)日:1987-01-13

    申请号:US565437

    申请日:1983-12-27

    申请人: Werner Scholz

    发明人: Werner Scholz

    CPC分类号: G11B15/14 G11B20/10

    摘要: When recording a PCM signal, particularly an audio signal, on the oblique tracks of a magnetic tape, e.g. for example of a videorecorder, errors occur in the digital signal during the change of heads. These errors are removed in that, in the region where the scanning of the heads overlaps, phase matching of the bit clock pulses is effected, the bit patterns are matched and the number of bit clock pulses is increased or reduced before the next change of heads.

    摘要翻译: 当将PCM信号,特别是音频信号记录在磁带的倾斜轨迹上时,例如, 例如视频录像机,在头部更换期间数字信号中出现错误。 这些误差被消除,因为在头扫描重叠的区域中,位时钟脉冲的相位匹配得以实现,位模式匹配,并且在下一次改变磁头之前增加或减少位时钟脉冲的数量 。

    Circuit for processing a digital signal
    19.
    发明授权
    Circuit for processing a digital signal 失效
    用于处理数字信号的电路

    公开(公告)号:US4406988A

    公开(公告)日:1983-09-27

    申请号:US238160

    申请日:1981-03-02

    申请人: Werner Scholz

    发明人: Werner Scholz

    IPC分类号: H03K5/08 H04L25/06 H03K5/153

    CPC分类号: H04L25/061

    摘要: In a circuit for processing a useful signal which varies in amplitude between positive and negative values about a zero value and contains information in the locations of its zero passages, which circuit includes: a zero passage detector having an input; a first capacitor connected in series between a source of the useful signal and the detector input; and components for coupling the useful signal with a first equalizing signal during the positive value intervals of the useful signal and with a second equalizing signal during the negative intervals of the useful signal, the coupling components include sources of the two equalizing signals, controllable switches connected to each source for selectively coupling the corresponding equalizing signal with the useful signal; and a control pulse generator means connected for applying to each said switch control pulses derived from the useful signal and having a timing such that each switch is closed for a predetermined period during its associated intervals of the useful signal.

    摘要翻译: 在用于处理在零值的正值和负值之间变化的有用信号的电路中,包含其零通道的位置中的信息,该电路包括:具有输入的零通过检测器; 串联连接在有用信号源和检测器输入之间的第一电容器; 以及用于在有用信号的正值间隔期间在有用信号的正值间隔期间将有用信号与第一均衡信号耦合的组件以及在有用信号的负间隔期间的第二均衡信号,耦合分量包括两个均衡信号的源,连接的可控开关 到每个源,用于选择性地将相应的均衡信号与有用信号耦合; 以及控制脉冲发生器装置,其连接用于向每个所述开关施加控制从有用信号导出的脉冲,并且具有使得每个开关在其有用信号的相关间隔期间关闭预定时段的定时。

    Modulator and demodulator circuits for modified delay modulation method
    20.
    发明授权
    Modulator and demodulator circuits for modified delay modulation method 失效
    用于修改延迟调制方法的调制器和解调器电路

    公开(公告)号:US4346353A

    公开(公告)日:1982-08-24

    申请号:US154127

    申请日:1980-05-29

    申请人: Werner Scholz

    发明人: Werner Scholz

    CPC分类号: H04L25/4904

    摘要: In a modulation and demodulation system for converting a binary sequence composed of a succession of bits, each having a value of "1" or "0", occurring in successive bit intervals, into a transmitted signal containing a representation of each bit, by representing a bit of one value as a change in the level of the transmitted signal at a time corresponding to the middle of the associated bit interval, and representing a bit of the other value as a change in the level of the transmitted signal at a time corresponding to the end of the associated bit interval if a further bit of the other value follows, transmitted signal level changes associated with the bits of the other value are in part suppressed for causing the time period between level changes in the transmitted signal to be no longer than the period of more than two consecutive level changes at intervals equal to each bit interval and associated with the bits of the other value.

    摘要翻译: 在用于将由连续比特间隔中出现的具有“1”或“0”值的一系列比特组成的二进制序列转换成包含每个比特的表示的发送信号的调制和解调系统中, 作为在与相关联的位间隔的中间相对应的时间处的发送信号的电平的变化的一个值,并且将另一个值的位表示为在相应的时间处的发送信号的电平的变化 到相关位间隔的结尾,如果另一个值的另一个比特跟随,则与另一个值的比特相关联的发射信号电平变化被部分地抑制,以使发射信号的电平变化之间的时间周期不再 比等于每个位间隔的间隔多于两个连续电平变化的周期,并与另一个值的位相关联。