公开(公告)号：US20250014657A1

公开(公告)日：2025-01-09

申请号：US18757422

申请日：2024-06-27

Applicant: Micron Technology, Inc.

Inventor： Yu-Chung LIEN ,  Ekamdeep SINGH ,  Zhenming ZHOU

IPC: G11C16/34

Abstract: In some implementations, a memory device may receive, from a host device, a single-level cell (SLC) program command instructing host data to be written to one or more subblocks of memory. The memory device may determine whether a word line associated with a subblock, of the one or more subblocks, is associated with a reliability risk. The memory device may determine whether to perform a word line leakage monitoring procedure associated with a programming scheme to be used to program the subblock based on whether the word line is associated with the reliability risk.

公开(公告)号：US20240045601A1

公开(公告)日：2024-02-08

申请号：US17817465

申请日：2022-08-04

Applicant: Micron Technology, Inc.

Inventor： Yu-Chung LIEN ,  Ching-Huang LU ,  Zhenming ZHOU

IPC: G06F3/06

CPC classification number: G06F3/0625 ,  G06F3/0653 ,  G06F3/0673

Abstract: In some implementations, a memory device may detect a read command associated with reading data stored by the memory device. The memory device may determine whether the read command is from a host device in communication with the memory device. The memory device may select, based on whether the read command is from the host device, one of a first voltage pattern or a second voltage pattern to be applied to memory cells of the memory device to execute the read command, wherein the first voltage pattern is selected if the read command is from the host device and the second voltage pattern is selected if the read command is not from the host device, wherein the second voltage pattern is different from the first voltage pattern. The memory device may execute the read command using a selected one of the first voltage pattern or the second voltage pattern.