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公开(公告)号：US20220092172A1
公开(公告)日：2022-03-24
申请号：US17420949
申请日：2019-01-09
Applicant: NEC Corporation
Inventor： Hikaru TSUCHIDA , Takao TAKENOUCHI , Toshinori ARAKI , Kazuma OHARA , Takuma AMADA
Abstract: A verification apparatus acquires a source code for multiparty computation, while changing a combination of options settable to a multiparty computation compiler, compiles the source code for each combination of options to generate a plurality of multiparty computation executable codes, selects at least one multiparty computation executable code from the plurality of multiparty computation executable codes as a verification code and provides the at least one verification code to a verification environment of multiparty computation, generates an evaluation index with respect to an execution result of at least one verification code in the verification environment, and selects at least one recommended code from the plurality of multiparty computation executable codes, based on the evaluation index corresponding to at least one verification code and outputs the selected recommended code.
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公开(公告)号：US20210334099A1
公开(公告)日：2021-10-28
申请号：US16614190
申请日：2017-05-18
Applicant: NEC CORPORATION , BAR-ILAN UNIVERSITY
Inventor： Toshinori ARAKI , Kazuma OHARA , Jun FURUKAWA , Lindell YEHUDA , Nof ARIEL
Abstract: A method for multiparty computation wherein a plurality of parties each compute a preset function without revealing inputs thereof to others, comprises: each of the parties performing a validation step to validate that computation of the function is carried out correctly, wherein the validation step includes: a first step that prepares a plurality of verified multiplication triples and feeds a multiplication triple to a second step when required; and the second step that consumes a randomly selected multiplication triple generated by the first step, wherein the first step performs shuffling of the generated multiplication triples, in at least one of shuffle in a sequence and shuffle of sequences.
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公开(公告)号：US20210157955A1
公开(公告)日：2021-05-27
申请号：US16614259
申请日：2017-05-18
Applicant: NEC CORPORATION , BAR-ILAN UNIVERSITY
Inventor： Toshinori ARAKI , Kazuma OHARA , Jun FURUKAWA , Lindell YEHUDA , Nof ARIEL
Abstract: The present invention provides a bit decomposition secure computation system comprising: a share value storage apparatus to store share values obtained by applying (2, 3) type RSS using modulo of power of 2 arithmetic; a decomposed share value storage apparatus to store a sequence of share values obtained by applying (2, 3) type RSS using modulo 2 arithmetic; and a bit decomposition secure computation apparatus that, with respect to sharing of a value w, r1, r2, and r3 satisfying w=r1+r2+r3 mod 2{circumflex over ( )}n, where {circumflex over ( )} is a power operator and n is a preset positive integer, being used as share information by the (2, 3) type RSS stored in the share value storage apparatus, includes: an addition sharing unit that sums two values out of r1, r2 and r3 by modulo 2{circumflex over ( )}n, generates and distributes a share value of the (2, 3) type RSS with respect to the sum; and a full adder secure computation unit that executes addition processing of the value generated by the addition sharing unit and a value not used by the addition sharing unit, for each digit, by using secure computation of a full adder, and stores the result in the decomposed share value storage apparatus.
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公开(公告)号：US20210082319A1
公开(公告)日：2021-03-18
申请号：US16613189
申请日：2017-05-18
Applicant: NEC Corporation
Inventor： Toshinori ARAKI , Kazuma OHARA
Abstract: This numerical splitting device: acquires a numerical value w and a parameter p; generates a first random number r1 and a second random number r2; computes a third random number r3 based on the numerical value w, parameter p, first random number r1, and second random number r2 according to an expression, r3=w−r1-r2 mod p; computes first to third segments s1, s2, s3 based on the first to third random numbers r1, r2, r3 and the parameter p according to expressions, s1=r1+r2 mod p, s2=r2+r3 mod p, and s3=r3+r1 mod p; and transmits a pair of the first segment s1 and the second random number r2, a pair of the second segment s2 and the third random number r3, and a pair of the third segment s3 and the first random number r1 to first to third secure computation devices, respectively.
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15.发明申请公开(公告)号：US20180241747A1
公开(公告)日：2018-08-23
申请号：US15753053
申请日：2016-08-18
Applicant: NEC CORPORATION
Inventor： Yuki TANAKA , Jun FURUKAWA , Kazuma OHARA , Toshinori ARAKI
CPC classification number: H04L63/0869 , G06F21/31 , G06F21/45 , H04L9/085 , H04L9/3242 , H04L63/061 , H04L63/123
Abstract: An information processing apparatus that authenticates sets of distributed authentication information without collecting, the sets of distributed authentication information, to be collected at any one of apparatuses included in a system. The apparatus includes: a secure computation unit that determines whether master authentication information, which is stored in advance and is one information to be compared for authentication, matches authentication information, which is received from a first information processing apparatus and is the other information to be compared for authentication, by executing secure computation with a second information processing apparatus based on one set of distributed master authentication information obtained by distributing the master authentication information by using a secret distribution method and based on one set of distributed authentication information obtained by distributing the authentication information by the secret distribution method; and a process execution unit that executes a predetermined process based on the determination result.
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Patent Agency Ranking
公开(公告)号：US20220343027A1
公开(公告)日：2022-10-27
申请号：US17762581
申请日：2019-09-26
Applicant: NEC Corporation , BAR-ILAN UNIVERSITY
Inventor： Toshinori ARAKI , Kazuma OHARA , Hikaru TSUCHIDA , Jun FURUKAWA , Binyamin PINKAS
IPC: G06F21/64
Abstract: A computation system according to the present disclosure includes: shuffling secure computation means for executing secure computation processing by shuffling; random bit sharing means for generating, as security parameters, K pieces of random data; and unauthorized action detecting secure computation means for determining that an exclusive OR operation of values for all rows obtained by multiplying the exclusive OR operation of each row of the tables before the shuffling processing for each data designated by the i-th random data by the i-th random bit of each row is the same as an exclusive OR operation of values for all rows obtained by multiplying the exclusive OR operation of each row of the tables after the shuffling processing for each data designated by the i-th random data by the i-th random bit of each row.
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公开(公告)号：US20210176252A1
公开(公告)日：2021-06-10
申请号：US16769792
申请日：2017-12-05
Applicant: NEC CORPORATION
Inventor： Hikaru TSUCHIDA , Toshinori ARAKI , Kazuma OHARA
Abstract: A random number generation server device includes a random number generation unit generating random numbers, a share addition unit generating secret shared data masked using random numbers and the secret shared data of operands in secret equality determination, a secret shared data generation unit generating secret shared data of inputted values, a secret shared data restoration unit obtaining the original values by restoring the secret shared data, and a determination bit-conjunction unit using the secret shared data to perform secret equality determination. A mask value restoration server device includes a secret shared data generation unit, a secret shared data restoration unit, and a determination bit-conjunction unit. A secure computation server device includes a secret shared data generation unit, a secret shared data restoration unit, and a determination bit-conjunction unit.
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公开(公告)号：US20200374107A1
公开(公告)日：2020-11-26
申请号：US16769697
申请日：2017-12-05
Applicant: NEC Corporation
Inventor： Hikaru TSUCHIDA , Toshinori ARAKI , Kazuma OHARA
Abstract: A server device, a secret equality determination system, a secret equality determination method and a secret equality determination program recording medium are provided which, regardless of the server sharing scheme, can run with no difference in the number of communication rounds, whether carried out with a ring of order 2 or with a ring of an order greater than 2. This server device is provided with a secret shared data generation unit, a data storage unit, a mask unit, a random number share bit-conjunction unit, a random number share generation unit, a determination bit-conjunction unit and a secret shared data restoration unit. The secret shared data generation unit generates secret shared data. The data storage unit stores the secret shared data. The mask unit uses random number secret shared data to mask certain shared data. The random number share generation unit generates random number shares in which random numbers are secretly shared. In parallel with other calculations, the random number share bit-conjunction unit calculates the logical product of the values in which the random numbers are secretly shared. The determination bit-conjunction unit performs a secret equality determination using the value outputted by the random number share bit-conjunction unit.
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公开(公告)号：US20200287711A1
公开(公告)日：2020-09-10
申请号：US16759876
申请日：2017-10-31
Applicant: NEC Corporation
Inventor： Toshinori ARAKI , Kazuma OHARA , Jun FURUKAWA
Abstract: A bit-decomposition secure computation apparatus uses r1, r2, and r3 satisfying w=r1+r2+r3 mod 2{circumflex over ( )}n as share information of (2, 3) threshold type RSS (Replicated Secret Sharing) stored in a share value storage apparatus, and includes an addition sharing part that sums two values out of the share information by modulo 2{circumflex over ( )}n arithmetic and distributes the sum using (2, 3) type RSS; and a full adder secure computation part that adds the value generated by the addition sharing part by distributing the sum of the two values to share information of one remaining value other than the two values used by the addition sharing part for each digit by using secure computation of a full adder.
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公开(公告)号：US20190212986A1
公开(公告)日：2019-07-11
申请号：US16325775
申请日：2017-07-06
Applicant: NEC Corporation
Inventor： Toshinori ARAKI , Jun FURUKAWA , Kazuma OHARA , Haruna HIGO
CPC classification number: G06F7/584 , G06F7/4824 , G06F7/49942 , G09C1/00 , H04L9/085
Abstract: The present invention executes secure multiplication, in which a computed value, a computation result, and a value during computation cannot be known, while suppressing an overall communication amount. A secure computation system comprises a distribution information generation apparatus that generates, from at least two fixed-point numbers, data distribution values, sign distribution values and carry distribution values by distributing each of the at least two fixed-point numbers using an additive secret sharing scheme, and a secure computation apparatus group including at least two secure computation apparatuses. The secure computation apparatus group comprises a secure digit extender that generates at least two extended fixed-point numbers formed from extended data distribution values, extended sign distribution values and extended carry distribution values, all of which are obtained by extending digit numbers using the data distribution values, the sign distribution values and the carry distribution values of the at least two fixed-point numbers while protecting a security, and a secure multiplier that generates extended data distribution values, extended sign distribution values and extended carry distribution values of an extended multiplication result of multiplying a first extended fixed-point number and a second extended fixed-point number that are generated by said secure digit extender while protecting a security, and adjusts digit numbers of the extended data distribution values of the extended multiplication result to make distribution values of a secure multiplication result.
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