公开(公告)号：US20220416796A1

公开(公告)日：2022-12-29

申请号：US17304628

申请日：2021-06-23

Applicant: NXP B.V.

Inventor： Gaurav Agrawal ,  Deependra Kumar Jain ,  Krishna Thakur

IPC: H03L7/10 ,  H03L7/081

Abstract: An initialization circuit of a delay locked loop (DLL) includes a sense circuit and a control circuit. The sense circuit receives an enable signal, a reference clock signal, and various delayed reference clock signals, and outputs another enable signal. The control circuit receives the two enable signals and outputs and provides a control signal to a loop filter of the DLL to control a delay value associated with the DLL. The control signal is provided to the loop filter such that the delay value associated with the DLL equals a predetermined delay value for a predetermined time duration. Further, after a lapse of the predetermined time duration, the delay value associated with the DLL increases until a difference between a time period of the reference clock signal and the delay value equals a threshold value.