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公开(公告)号:US20230145803A1
公开(公告)日:2023-05-11
申请号:US17916743
申请日:2021-04-05
Inventor: Ryosuke MAEDA , Yusuke KINOSHITA , Hidetoshi ISHIDA
CPC classification number: H03K17/166 , H02H3/202
Abstract: A control circuit controls a switching element including a gate and a source corresponding to the gate. The control circuit includes an inductor, a circuit element, and a resistor. The inductor is connected between the gate and the source of the switching element. The circuit element is connected in series to the inductor between the gate and the source. The circuit element allows an electric current to flow therethrough in response to generation of electromotive force in the inductor. The resistor is connected in parallel to the inductor and the circuit element between the gate and the source.
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公开(公告)号:US20200044068A1
公开(公告)日:2020-02-06
申请号:US16499149
申请日:2018-03-26
Inventor: Hiroaki UENO , Asamira SUZUKI , Hidetoshi ISHIDA
IPC: H01L29/778 , H01L29/43 , H01L29/20
Abstract: A semiconductor portion thereof includes a heterojunction defining a junction between a first compound semiconductor portion and a second compound semiconductor portion having a greater bandgap than the first compound semiconductor portion. The heterojunction intersects with a second direction defined along a first surface of a substrate. A first electrode is arranged opposite from the substrate with respect to the semiconductor portion. A second electrode is arranged on a second surface of the substrate. A gate electrode intersects with the second direction between the first electrode and the second electrode and faces the second compound semiconductor portion. A gate layer is interposed in the second direction between the gate electrode and the second compound semiconductor portion and forms a depletion layer in the second compound semiconductor portion and the first compound semiconductor portion.
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公开(公告)号:US20200027814A1
公开(公告)日:2020-01-23
申请号:US16497744
申请日:2018-03-27
Inventor: Takashi ICHIRYU , Masanori NOMURA , Yusuke KINOSHITA , Hidetoshi ISHIDA , Yasuhiro YAMADA
IPC: H01L23/367 , H01L23/373 , H01L23/29 , H01L23/00 , H01L23/31 , H01L23/532
Abstract: A semiconductor device includes a supporting substrate, a semiconductor chip, a resin member, and a heat-dissipating metal layer. The supporting substrate has a first surface and a second surface located opposite from each other in a thickness direction defined for the supporting substrate. The semiconductor chip includes a plurality of electrodes. The semiconductor chip is bonded to the supporting substrate on one side thereof with the first surface. The resin member has a first surface and a second surface located opposite from each other in a thickness direction defined for the resin member. The resin member covers at least a side surface of the supporting substrate and a side surface of the semiconductor chip. The heat-dissipating metal layer is arranged in contact with the supporting substrate and the resin member to cover the second surface of the supporting substrate and the second surface of the resin member at least partially.
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