Electrical facility and arrangement for protecting the electrical facility

    公开(公告)号:US10074974B2

    公开(公告)日:2018-09-11

    申请号:US14954327

    申请日:2015-11-30

    发明人: Dirk Prochaska

    IPC分类号: H02H9/04 H02H3/20

    CPC分类号: H02H9/045 H02H3/202 H02H9/041

    摘要: An arrangement for protecting an electrical facility from overvoltages having an overcurrent protection facility arranged in a first series circuit and a shunt circuit arranged between the overcurrent protection facility and the electrical facility to be protected, the shunt series resulting in a second series circuit, wherein a diode for discharging transient overvoltages is arranged in the shunt circuit, which is conductive if a voltage threshold is exceeded, as a result of which the current resulting from the overvoltage can be passed through the shunt circuit to the facility to be protected into the second shunt circuit, where a first inductor is arranged in a series connection to the diode, the diode is connected here to a first diode terminal on the first series circuit and is connected to a second diode terminal on the first inductor, and where the overcurrent protection facility is not triggered prematurely by temporary overvoltages.

    UNDERVOLTAGE PROTECTION CIRCUIT AND OVERVOLTAGE PROTECTION CIRCUIT

    公开(公告)号:US20180205215A1

    公开(公告)日:2018-07-19

    申请号:US15581740

    申请日:2017-04-28

    IPC分类号: H02H3/20

    摘要: An undervoltage protection circuit and an overvoltage protection circuit include a first comparator and a second comparator. The first comparator has a first input terminal, a second input terminal, and a first output terminal. The second comparator has a third input terminal, a fourth input terminal, and a second output terminal. The third input terminal receives a reference voltage and the fourth input terminal receives a first feedback voltage. The first and the second output terminals are coupled with a logic device. The first feedback voltage is converted to a second feedback voltage by the delay circuit and the voltage level shifter. The first comparator outputs a detection enabling voltage for undervoltage/overvoltage detection when the first feedback voltage crosses the second feedback voltage. The logic device outputs a protection voltage level undervoltage/overvoltage protection when the first feedback voltage crosses the reference voltage.

    Electrostatic discharge protection for a transformer balun

    公开(公告)号:US09806521B2

    公开(公告)日:2017-10-31

    申请号:US14527205

    申请日:2014-10-29

    IPC分类号: H02H9/04 H02H3/20 H02H3/02

    摘要: A balun includes an input coil and an output coil with first and second outputs that vary during normal operation. The output coil has a center point connection that remains substantially constant during normal operation. An ESD circuit provides a low impedance path between the center point connection and chip ground when the voltage at the center point connection is above a first threshold voltage or below a second threshold voltage and isolates the center point connection from chip ground otherwise. Another ESD protection circuit provides ESD protection for other input or output terminals of the integrated circuit by selectively coupling the other input or output terminals to chip ground. Thus, a charge that builds up between one of the balun outputs and another terminal on the integrated circuit can be safely dissipated.

    Electronic Switching and Protection Circuit
    10.
    发明申请

    公开(公告)号:US20170294918A1

    公开(公告)日:2017-10-12

    申请号:US15094463

    申请日:2016-04-08

    IPC分类号: H03M1/12 H02H3/38

    摘要: An embodiment electronic circuit includes an electronic switch comprising a load path, a first protection circuit configured to generate a first protection signal based on a current-time-characteristic of a load current through the load path of the electronic switch, and a drive circuit configured to drive the electronic switch based on the first protection signal. The first protection circuit includes an analog-to-digital converter (ADC) configured to receive an ADC input signal representing the load current, to sample the ADC input signal once in each of a plurality of successive sampling periods, and to output an ADC output signal that includes a sequence of values such that each of the values represents a respective sample of the ADC input signal. The ADC is configured to pseudo-randomly select a sample time in each sampling period.