公开(公告)号：US12143098B2

公开(公告)日：2024-11-12

申请号：US17998658

申请日：2021-04-05

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Yusuke Kinoshita ,  Yuta Nagatomi ,  Ryosuke Maeda ,  Satoshi Nakazawa

IPC: H03K17/082

Abstract: A power loss of a switching device is suppressed. Circuit for a switching device is used in switching device. Switching device includes first path and second path. First path includes first field effect transistor and first inductor. Second path includes second field effect transistor and second inductor. First path and second path are connected in parallel to power supply. A first maximum current that is a maximum current during conduction of first field effect transistor is smaller than a second maximum current that is a maximum current during conduction of second field effect transistor. Circuit for a switching device includes processing part. Processing part executes a specific operation according to a voltage difference between voltage across first inductor and voltage across second inductor.

公开(公告)号：US11605715B2

公开(公告)日：2023-03-14

申请号：US17256475

申请日：2019-06-12

Applicant: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.

Inventor： Masanori Nomura ,  Hiroaki Ueno ,  Yusuke Kinoshita ,  Yasuhiro Yamada ,  Hidetoshi Ishida

IPC: H01L29/20 ,  H01L29/43 ,  H01L29/778 ,  H01L29/808

Abstract: A bidirectional switch element includes: a substrate; an AlzGa1-zN layer; an AlbGa1-bN layer; a first source electrode; a first gate electrode; a second gate electrode; a second source electrode; a p-type Alx1Ga1-x1N layer; a p-type Alx2Ga1-x2N layer; an AlyGa1-yN layer; and an AlwGa1-wN layer. The AlzGa1-zN layer is formed over the substrate. The AlbGa1-bN layer is formed on the AlzGa1-zN layer. The AlyGa1-yN layer is interposed between the substrate and the AlzGa1-zN layer. The AlwGa1-wN layer is interposed between the substrate and the AlyGa1-yN layer and has a higher C concentration than the AlyGa1-yN layer.

公开(公告)号：US11595038B2

公开(公告)日：2023-02-28

申请号：US17256642

申请日：2019-06-12

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Yusuke Kinoshita ,  Yasuhiro Yamada ,  Hidekazu Umeda

IPC: H03K17/56 ,  H01L29/20 ,  H01L29/205 ,  H01L29/778 ,  H02M7/537

Abstract: A control system includes a control unit. When turning a bidirectional switch element ON, the control unit controls the bidirectional switch element to cause a time lag between a first timing and a second timing. The first timing is a timing when a voltage equal to or higher than a threshold voltage is applied to one gate electrode selected from a first gate electrode and a second gate electrode. The one gate electrode is associated with one source electrode selected from a first source electrode and a second source electrode and having a lower potential than the other source electrode. The second timing is a timing when a voltage equal to or higher than a threshold voltage is applied to the other gate electrode associated with the other source electrode having a higher potential than the one source electrode.

公开(公告)号：US10510656B2

公开(公告)日：2019-12-17

申请号：US15329464

申请日：2015-07-01

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Yusuke Kinoshita ,  Satoshi Tamura

IPC: H01L23/522 ,  H01L21/768 ,  H01L23/528 ,  H01L23/532 ,  H01L23/13 ,  H01L23/535 ,  H01L25/065 ,  H01L27/088

Abstract: A semiconductor device includes: a high-side transistor having a first gate electrode, first drain electrodes and first source electrodes; a low-side transistor having a second gate electrode, second drain electrodes and second source electrodes; a plurality of first drain pads that are disposed above the first drain electrodes and are electrically connected to the first drain electrodes; a plurality of first source pads that are disposed above the second source electrodes and are electrically connected to the second source electrodes; a plurality of first common interconnects that are disposed above the first source electrodes and above the second drain electrodes and are electrically connected to the first source electrodes and the second drain electrodes; and a plurality of second common interconnects that are connected to the first common interconnects, and extend in a direction that intersects with the first common interconnects.