公开(公告)号：US10147646B2

公开(公告)日：2018-12-04

申请号：US15811733

申请日：2017-11-14

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Hidehiko Karasaki ,  Hidefumi Saeki ,  Atsushi Harikai

IPC: H01L21/78 ,  H01L21/268

Abstract: A manufacturing process of an element chip comprises a preparation step for preparing a substrate, the substrate including first and second streets crossing each other to define a plurality of element regions. Also, it comprises a first shallow-groove formation step for radiating a laser beam along the first streets to form a plurality of first shallow grooves being shallower than a thickness of the substrate, a second shallow-groove formation step for radiating the laser beam along the second streets to form a plurality of second shallow grooves being shallower than a thickness of the substrate, a first groove formation step for radiating the laser beam along the first shallow grooves to form a plurality of first grooves, and a plasma dicing step for etching the substrate along the first grooves and the second shallow grooves by a plasma exposure to dice the substrate into a plurality of element chips.