公开(公告)号：US10410924B2

公开(公告)日：2019-09-10

申请号：US15860827

申请日：2018-01-03

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Hidehiko Karasaki ,  Hidefumi Saeki ,  Atsushi Harikai

IPC: H01L21/78 ,  H01L23/544 ,  H01L21/268 ,  H01L21/3065 ,  H01L21/02 ,  B23K26/359 ,  H01L21/82 ,  H01L21/67 ,  H01L21/683 ,  B23K26/062 ,  H01J37/32 ,  B23K103/00

Abstract: Provided is a manufacturing process of an element chip, which comprises a preparation step for preparing a substrate including a semiconductor layer having first and second sides and a wiring layer on the first side thereof, the substrate having a plurality of dicing regions and element regions defined by the dicing regions, a scribing step for radiating a laser beam towards the first side of the wiring layer onto the dicing regions to form apertures exposing the semiconductor layer along the dicing regions, and a dicing step for dicing the substrate along the apertures into a plurality of the element chips, wherein the laser beam has a beam profile having a M-shaped distribution whose peripheral intensity is greater than a central intensity in a width direction of the laser beam along the dicing regions.

公开(公告)号：US11219929B2

公开(公告)日：2022-01-11

申请号：US16896338

申请日：2020-06-09

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Akihiro Itou ,  Atsushi Harikai ,  Toshiyuki Takasaki ,  Hidefumi Saeki ,  Shogo Okita

IPC: B08B3/08 ,  B08B3/04

Abstract: An element chip cleaning method including: an element chip preparation step of preparing at least one element chip having a first surface and a second surface opposite the first surface, the first surface covered with a resin film; a first cleaning step of bringing a first cleaning liquid into contact with the resin film, the first cleaning liquid including a solvent that dissolves at least part of a resin component contained in the resin film; and a second cleaning step of spraying a second cleaning liquid against the resin film from the first surface side of the element chip, after the first cleaning step.

公开(公告)号：US10796960B2

公开(公告)日：2020-10-06

申请号：US16218554

申请日：2018-12-13

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Hidefumi Saeki ,  Atsushi Harikai

IPC: H01L21/78 ,  H01L21/3065 ,  H01L21/311 ,  H01L21/268 ,  H01L21/304

Abstract: A manufacturing process of an element chip, comprising a substrate preparing step for preparing a substrate having first and second sides opposed to each other, and including a plurality of dicing regions and element regions defined by the dicing regions, the first side being covered by a protective film, a first laser-grooving step for forming a plurality of grooves by irradiating a laser beam to the first side along the dicing regions, and a plasma-dicing step for plasma-etching the substrate along the grooves in depth through a plasma exposure, thereby to dice the substrate into a plurality of element chips, wherein the second side of the substrate and an annular frame are held on a holding sheet in the substrate preparing step, and wherein the laser beam is irradiated only in a region inside an outer edge of the substrate in the first laser-grooving step.

公开(公告)号：US11688641B2

公开(公告)日：2023-06-27

申请号：US16881165

申请日：2020-05-22

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Hidefumi Saeki ,  Hidehiko Karasaki ,  Shogo Okita ,  Atsushi Harikai ,  Akihiro Itou

IPC: H01L21/82 ,  H01L21/56 ,  H01L21/3065 ,  H01L21/311 ,  H01L21/78

CPC classification number: H01L21/82 ,  H01L21/3065 ,  H01L21/31122 ,  H01L21/31127 ,  H01L21/568

Abstract: An element chip manufacturing method including: attaching a substrate via a die attach film (DAF) to a holding sheet; forming a protective film that covers the substrate; forming an opening in the protective film with a laser beam, to expose the substrate in the dicing region therefrom; exposing the substrate to a first plasma to etch the substrate exposed from the opening, so that a plurality of element chips are formed from the substrate and so that the DAF is exposed from the opening; exposing the substrate to a second plasma to etch the die attach film exposed from the opening, so that the DAF is split so as to correspond to the element chips; and detaching the element chips from the holding sheet, together with the split DAF. The DAF is larger than the substrate. The method includes irradiating the laser beam to the DAF protruding from the substrate.

公开(公告)号：US11551974B2

公开(公告)日：2023-01-10

申请号：US17471661

申请日：2021-09-10

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Hidefumi Saeki ,  Atsushi Harikai ,  Shogo Okita

IPC: H01L21/78 ,  H01L23/544 ,  H01L21/268 ,  B23K26/00 ,  B23K26/364 ,  H01L21/3065

Abstract: A manufacturing process of an element chip comprises a preparing step for preparing a substrate having first and second sides opposed to each other, the substrate containing a semiconductor layer, a wiring layer and a resin layer formed on the first side, and the substrate including a plurality of dicing regions and element regions defined by the dicing regions. Also, the manufacturing process comprises a laser grooving step for irradiating a laser beam onto the dicing regions to form grooves so as to expose the semiconductor layer along the dicing regions. Further, the manufacturing process comprises a dicing step for plasma-etching the semiconductor layer along the dicing regions through the second side to divide the substrate into a plurality of the element chips. The laser grooving step includes a melting step for melting a surface of the semiconductor layer exposed along the dicing regions.

公开(公告)号：US10896849B2

公开(公告)日：2021-01-19

申请号：US16426116

申请日：2019-05-30

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Hidehiko Karasaki ,  Shogo Okita ,  Noriyuki Matsubara ,  Hidefumi Saeki

IPC: H01L21/78 ,  B23K26/40 ,  H01L21/3065 ,  B23K26/364 ,  H01L21/308 ,  H01L21/02 ,  B23K101/40

Abstract: A substrate has first and second surfaces, and includes a plurality of element regions and dividing region defining the element regions. A method for manufacturing an element chip includes: a step of spray coating, to the first surface of the substrate, a mixture containing a water-soluble resin and an organic solvent having a higher vapor pressure than water, and drying the coated mixture at a temperature of 50° C. or less, to form a protective film; a laser grooving step of removing portions of the protective film covering the dividing regions; a step of dicing the substrate into element chips by plasma etching the substrate; and a step of removing the portions of the protective film covering the element regions. The mixture has a solid component ratio of 200 g/L or more, and droplets of the sprayed mixture have an average particle size of 12 μm or less.

公开(公告)号：US11145548B2

公开(公告)日：2021-10-12

申请号：US16362933

申请日：2019-03-25

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Hidefumi Saeki ,  Atsushi Harikai ,  Shogo Okita

IPC: H01L21/78 ,  H01L23/544 ,  H01L21/268 ,  B23K26/00 ,  B23K26/364 ,  H01L21/3065

Abstract: A manufacturing process of an element chip comprises a preparing step for preparing a substrate having first and second sides opposed to each other, the substrate containing a semiconductor layer, a wiring layer and a resin layer formed on the first side, and the substrate including a plurality of dicing regions and element regions defined by the dicing regions. Also, the manufacturing process comprises a laser grooving step for irradiating a laser beam onto the dicing regions to form grooves so as to expose the semiconductor layer along the dicing regions. Further, the manufacturing process comprises a dicing step for plasma-etching the semiconductor layer along the dicing regions through the second side to divide the substrate into a plurality of the element chips. The laser grooving step includes a melting step for melting a surface of the semiconductor layer exposed along the dicing regions.

公开(公告)号：US10964597B2

公开(公告)日：2021-03-30

申请号：US16567047

申请日：2019-09-11

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Atsushi Harikai ,  Shogo Okita ,  Noriyuki Matsubara ,  Hidefumi Saeki ,  Akihiro Itou

IPC: H01L21/78 ,  H01L21/68 ,  H01L21/683

Abstract: An element chip manufacturing method including: a preparing step of preparing a first conveying carrier including a holding sheet and a frame, and a substrate held on the holding sheet, the holding sheet having a first surface and a second surface opposite the first surface, the frame attached to at least part of a peripheral edge of the holding sheet; a placing step of placing the first conveying carrier holding the substrate, on a second conveying carrier; a preprocessing step of preprocessing the substrate, after the placing step; a removing step of removing the second conveying carrier, after the preprocessing step; and a dicing step of subjecting the substrate held on the first conveying carrier to plasma exposure, after the removing step, to form a plurality of element chips from the substrate.

公开(公告)号：US10892190B2

公开(公告)日：2021-01-12

申请号：US16246627

申请日：2019-01-14

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Shogo Okita ,  Atsushi Harikai ,  Noriyuki Matsubara ,  Hidefumi Saeki ,  Akihiro Itou

IPC: H01L21/78 ,  H01L21/56 ,  H01L21/683 ,  H01L21/3065 ,  H01J37/00 ,  H01L21/311 ,  H01L21/687 ,  H01L21/67

Abstract: A manufacturing process of an element chip comprises steps of preparing a substrate including dicing regions and element regions, attaching a holding sheet held on a frame with a die attach film in between, forming a protective film covering the substrate, forming a plurality of grooves in the protective film along the dicing regions, plasma-etching the substrate to expose the die attach film and then die attach film along the dicing regions, and picking up each of the element chips along with the separated die attach film away from the holding sheet, wherein the die attach film has an area greater than that of the substrate, and wherein the protective film includes a first covering portion covering the substrate and a second covering portion covering at least a portion of the die attach film that extends beyond an outer edge of the substrate.

公开(公告)号：US10607846B2

公开(公告)日：2020-03-31

申请号：US16103025

申请日：2018-08-14

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Hidehiko Karasaki ,  Noriyuki Matsubara ,  Atsushi Harikai ,  Hidefumi Saeki

IPC: H01L21/00 ,  H01L21/3065 ,  B23K26/0622 ,  H01L21/02 ,  H01L21/475 ,  H01L21/67 ,  H01L21/683 ,  H01L21/78

Abstract: Method of manufacturing an element chip which can suppress residual debris in plasma dicing. A back surface of a semiconductor wafer is held on a dicing tape. Then, a surface of the wafer is coated with a mask that includes a water-insoluble lower mask and a water-soluble upper mask. Subsequently, an opening is formed in the mask by irradiating the mask with laser light to expose a dividing region. Then, the semiconductor wafer is caused to come into contact with water to remove the upper mask covering each of the element regions while leaving the lower layer. After that, the wafer is exposed to plasma to perform etching on the dividing region exposed from the opening until the etching reaches the back surface, thereby dicing the semiconductor wafer into a plurality of element chips. Thereafter, the lower layer mask left on the front surface of the semiconductor chips is removed.