Computer aided design flow to locate grounded fill in a large scale integrated circuit
    11.
    发明授权
    Computer aided design flow to locate grounded fill in a large scale integrated circuit 有权
    计算机辅助设计流程来定位接地填充大规模集成电路

    公开(公告)号:US06499135B1

    公开(公告)日:2002-12-24

    申请号:US09579109

    申请日:2000-05-25

    IPC分类号: G06F1750

    CPC分类号: G06F17/5068

    摘要: For an integrated circuit having multiple metal layers, a computer-aided design (CAD) method for designing grounded fill in the integrated circuit includes: (a) finding the eligible fill areas for each metal layer; (b) storing the eligible fill area data for each metal layer in an overflow memory; (c) finding ground contact areas for each metal layer; (d) storing the ground contact area data for each metal layer in an overflow memory; (e) temporarily storing the eligible fill area data for a selected metal layer and the ground contact area data for the metal layers adjacent to the selected metal layer in active memory; (f) fitting a fill pattern to an eligible fill area in the selected metal layer, where the fill pattern is composed of at least one element; (g) checking the adjacent metal layers for a ground contact where the element of the fill pattern may be grounded; (h) locating a conductive via between the element of the fill pattern and a ground contact in an adjacent layer; and (i) repeating steps (e) through (h) for each metal layer.

    摘要翻译: 对于具有多个金属层的集成电路,用于设计集成电路中的接地填充的计算机辅助设计(CAD)方法包括:(a)找到每个金属层的合格填充区域; (b)将每个金属层的合格填充区域数据存储在溢出存储器中; (c)找出每个金属层的接地面积; (d)将每个金属层的接地面积数据存储在溢出存储器中; (e)临时存储所选择的金属层的合格填充区域数据和与所选金属层相邻的金属层的有源存储器中的接地区域数据; (f)将填充图案拟合到所选择的金属层中的合格填充区域,其中填充图案由至少一个元素组成; (g)检查相邻的金属层以获得填充图案的元件可以接地的接地触点; (h)将填充图案的元件和相邻层中的接地触点之间的导电通孔定位; 和(i)对于每个金属层重复步骤(e)至(h)。

    Antifuse with nonstoichiometric tin layer and method of manufacture
thereof
    15.
    发明授权
    Antifuse with nonstoichiometric tin layer and method of manufacture thereof 失效
    非化学计量锡层的防腐剂及其制造方法

    公开(公告)号:US5329153A

    公开(公告)日:1994-07-12

    申请号:US866037

    申请日:1992-04-10

    申请人: Pankaj Dixit

    发明人: Pankaj Dixit

    摘要: An antifuse in an integrated circuit which has first and second conducting lines, a semiconductor layer of amorphous silicon between the first and second conducting lines, and a barrier metal layer of TiN between the semiconductor layer and the first conducting layer is disclosed. The TiN layer is nonstoichiometric composition to enhance the probability of said antifuse having a desired resistance when said antifuse is programmed. More specifically, the TiN layer has a composition of Ti.sub.1.0 N.sub.0.5-0.8.

    摘要翻译: 公开了一种集成电路中的反熔丝,其具有第一和第二导电线,第一和第二导电线之间的非晶硅半导体层以及半导体层和第一导电层之间的TiN的阻挡金属层。 当所述反熔丝被编程时,TiN层是非化学计量组成,以增强所述反熔丝具有期望电阻的概率。 更具体地说,TiN层的组成为Ti1.0N0.5-0.8。

    Plug contact with antifuse
    16.
    发明授权
    Plug contact with antifuse 失效
    与防弹剂联系

    公开(公告)号:US5233217A

    公开(公告)日:1993-08-03

    申请号:US695363

    申请日:1991-05-03

    摘要: An antifuse particularly suitable for submicron geometries is presented. The antifuse is formed between a silicon layer, which could be a doped region of the semiconductor substrate, an epitaxial layer or a polysilicon layer, and an upper metal interconnection layer. In contact holes in a silicon dioxide layer insulating the silicon and metal interconnection layers from each other, the antifuses have a thick refractory metal layer having a top surface approximately at the same level as the top surface of the insulating layer. Depending upon the process used to deposit the refractory metal layer, a thin adhesion layer may be located immediately below the refractory metal layer. Between the underlying silicon layer and upper interconnection layer, a thin semiconductor material layer of amorphous silicon may be located either below the refractory metal layer or above it. At its bottom, the interconnection layer also has a barrier layer to prevent any intermixing between the amorphous silicon layer and the metal interconnection layer.

    摘要翻译: 提出了特别适用于亚微米几何形状的反熔丝。 反熔丝形成在可以是半导体衬底的掺杂区域的硅层,外延层或多晶硅层和上部金属互连层之间。 在硅和金属互连层彼此绝缘的二氧化硅层的接触孔中,反熔丝具有厚的难熔金属层,其顶表面与绝缘层的顶表面大致相同。 根据用于沉积难熔金属层的方法,薄的粘合层可以位于难熔金属层的正下方。 在下层硅层和上互连层之间,非晶硅的薄半导体材料层可以位于难熔金属层之下或其上方。 在其底部,互连层还具有阻挡层以防止非晶硅层和金属互连层之间的任何混合。