Buffer manager and methods for managing memory
    11.
    发明授权
    Buffer manager and methods for managing memory 有权
    缓冲区管理器和管理内存的方法

    公开(公告)号:US08327047B2

    公开(公告)日:2012-12-04

    申请号:US13038266

    申请日:2011-03-01

    IPC分类号: G06F3/00

    摘要: Some of the embodiments of the present disclosure provide a method comprising managing a plurality of buffer addresses in a system-on-chip (SOC); and if a number of available buffer addresses in the SOC falls below a low threshold value, obtaining one or more buffer addresses from a memory, which is external to the SOC, to the SOC. Other embodiments are also described and claimed.

    摘要翻译: 本公开的一些实施例提供了一种方法,包括:在芯片上系统(SOC)中管理多个缓冲器地址; 并且如果SOC中的多个可用缓冲器地址低于低阈值,则从SOC外部的存储器获得一个或多个缓冲器地址到SOC。 还描述和要求保护其他实施例。

    Model driven command language translator
    12.
    发明授权
    Model driven command language translator 有权
    模型驱动命令语言翻译器

    公开(公告)号:US08190718B1

    公开(公告)日:2012-05-29

    申请号:US12767937

    申请日:2010-04-27

    IPC分类号: G06F15/16 G06F12/00

    CPC分类号: G06F15/177 G06F8/51

    摘要: An embodiment includes a method that includes identifying a first functional effect that would be produced in an apparatus by executing in the apparatus one or more source commands. The embodiment includes determining whether the first functional effect is producible in the apparatus based on the apparatus executing one or more target commands written in a command language different than the language that the source commands are written in. The embodiment includes, in response to determining that the first functional effect is producible in the apparatus based on the apparatus executing the one or more target commands, producing an output comprising the one or more target commands for execution by the apparatus.

    摘要翻译: 实施例包括一种方法,其包括通过在装置中执行一个或多个源命令来识别将在装置中产生的第一功能效果。 该实施例包括基于执行用与写入源命令的语言不同的命令语言编写的一个或多个目标命令的装置来确定该装置中的第一功能效果是否可生产。该实施例包括响应于确定 基于执行一个或多个目标命令的装置,第一功能效果可在装置中产生,产生包括用于由装置执行的一个或多个目标命令的输出。

    Buffer overflow prevention for network devices
    13.
    发明授权
    Buffer overflow prevention for network devices 有权
    网络设备的缓冲区溢出预防

    公开(公告)号:US07916640B1

    公开(公告)日:2011-03-29

    申请号:US11204484

    申请日:2005-08-16

    申请人: Nafea Bishara

    发明人: Nafea Bishara

    IPC分类号: G01R31/08 H04J3/18

    摘要: An apparatus includes ports to transmit and receive packets, each packet being associated with one of a plurality of sessions, and a packet buffer to store the packets. A classifier identifies packets that include data representing a transmit window size for one of the sessions. A processor determines whether to reduce the transmit window size for the one of the sessions by comparing a size of the packet buffer to a sum of (i) the transmit window size for the one of the sessions and (ii) transmit window sizes for others of the sessions. The processor modifies the data representing the transmit window size for the one of the sessions to reduce the transmit window size for the one of the sessions before one or more of the ports transmits the packets comprising the data representing the transmit window size for the one of the sessions.

    摘要翻译: 一种装置包括用于发送和接收分组的端口,每个分组与多个会话中的一个相关联,以及分组缓冲器,用于存储分组。 分类器识别包括表示其中一个会话的发送窗口大小的数据的数据包。 处理器通过将分组缓冲器的大小与(i)会话中的一个的发送窗口大小和(ii)发送窗口大小对于其他会话的总和进行比较来确定是否减少会话中的一个的发送窗口大小 的会议。 在一个或多个端口发送包括表示发送窗口大小的数据的分组之前,处理器修改表示该会话之一的发送窗口大小的数据,以减少该会话中的一个的发送窗口大小 会议。

    Aligning IP payloads on memory boundaries for improved performance at a switch
    14.
    发明授权
    Aligning IP payloads on memory boundaries for improved performance at a switch 有权
    在内存边界上对齐IP有效载荷,以提高交换机的性能

    公开(公告)号:US07870361B1

    公开(公告)日:2011-01-11

    申请号:US12131837

    申请日:2008-06-02

    申请人: Nafea Bishara

    发明人: Nafea Bishara

    IPC分类号: G06F12/02 G06F12/16 G06F7/00

    CPC分类号: H04L49/604 H04L69/22

    摘要: A network device includes an alignment module to align payloads of received frames on memory boundaries in a buffer memory. The frames may be Ethernet frames which encapsulate IP (Internet Protocol) packets as payloads. The alignment module modifies the frame to shift the IP payload into a position in the memory regions such that the IP payload is aligned with the memory boundaries. The number x of non-data bits can be determined according to x=m*c+p, where m is the bit depth of memory regions, n is the length of a header, p is the non-zero remainder of the ratio n/m, and c is an integer.

    摘要翻译: 网络设备包括对准模块,用于将缓冲存储器中的存储器边界上的接收帧的有效载荷对准。 这些帧可以是将IP(因特网协议)分组封装成有效载荷的以太网帧。 对准模块修改帧以将IP有效负载移动到存储器区域中的位置,使得IP有效载荷与存储器边界对准。 可以根据x = m * c + p来确定非数据位的数量x,其中m是存储器区域的位深度,n是标题的长度,p是比率n的非零余数 / m,c为整数。

    Model driven command language translator
    15.
    发明授权
    Model driven command language translator 有权
    模型驱动命令语言翻译器

    公开(公告)号:US08478580B1

    公开(公告)日:2013-07-02

    申请号:US13480587

    申请日:2012-05-25

    IPC分类号: G06F15/16

    CPC分类号: G06F15/177 G06F8/51

    摘要: An embodiment includes a method that includes receiving source commands to establish a configuration to control a computer networking function in a computer networking device, wherein the source commands are written in a source command language. The method selectively translates the source commands from the source command language to target commands written in a target command language, wherein the translation is based, at least in part, on a function-to-function translation model. The configuration is established in the computer networking device based on the target commands.

    摘要翻译: 一个实施例包括一种方法,其包括接收源命令以建立用于控制计算机网络设备中的计算机联网功能的配置,其中源命令以源命令语言编写。 所述方法选择性地将来自源命令语言的源命令转换为以目标命令语言编写的目标命令,其中,所述翻译至少部分地基于功能到功能的翻译模型。 基于目标命令在计算机网络设备中建立配置。

    Switch device having a plurality of processing cores
    16.
    发明授权
    Switch device having a plurality of processing cores 有权
    具有多个处理核心的开关装置

    公开(公告)号:US08358651B1

    公开(公告)日:2013-01-22

    申请号:US12706704

    申请日:2010-02-16

    IPC分类号: H04L12/50

    摘要: A switching device comprises a plurality of switch cores, each switch core having a plurality of ports associated with the switch core. Each switch core is configured to perform ingress processing of a data frame using a local source port indicator corresponding to an ingress port selected from a first plurality of ports associated with the switch core. Ingress processing of a data frame includes applying a global target port indicator corresponding to an egress port selected from a second plurality of ports including ports associated with one or more other switch cores among the plurality of switch cores.

    摘要翻译: 交换设备包括多个交换机核心,每个交换机核心具有与交换机核心相关联的多个端口。 每个交换机核心被配置为使用对应于从与交换机核心相关联的第一多个端口中选择的入口端口的本地源端口指示符来执行数据帧的入口处理。 数据帧的入口处理包括应用与从多个端口中选择的出口端口对应的全局目标端口指示符,所述第二多个端口包括与所述多个交换机核心中的一个或多个其他交换机核心相关联的端口。

    Multi-speed serial interface for media access control and physical layer devices
    17.
    发明授权
    Multi-speed serial interface for media access control and physical layer devices 有权
    用于媒体访问控制和物理层设备的多速串行接口

    公开(公告)号:US08028095B1

    公开(公告)日:2011-09-27

    申请号:US12229376

    申请日:2008-08-22

    IPC分类号: G06F15/16

    摘要: A network device includes a media access control (MAC) device that transmits a first data stream at a first data rate, the first data stream including first symbols having M bits. A translator converts the first data stream to a second data stream at a second data rate. The translator includes a data appender that appends N bits to the first symbols in the first data stream to generate second symbols having M+N bits. A data duplicator duplicates the second symbols X times to produce the second data stream at the second data rate. M and X are integers greater than one, and N is greater than or equal to zero.

    摘要翻译: 网络设备包括以第一数据速率发送第一数据流的媒体访问控制(MAC)设备,所述第一数据流包括具有M位的第一符号。 翻译器以第二数据速率将第一数据流转换为第二数据流。 翻译器包括数据追加器,其将N位附加到第一数据流中的第一符号,以生成具有M + N位的第二符号。 数据复制器复制第二符号X次以产生第二数据速率的第二数据流。 M和X是大于1的整数,N大于或等于零。

    Apparatus and method for efficient longest prefix match lookup
    18.
    发明授权
    Apparatus and method for efficient longest prefix match lookup 有权
    用于有效最长前缀匹配查找的装置和方法

    公开(公告)号:US08018944B1

    公开(公告)日:2011-09-13

    申请号:US12609549

    申请日:2009-10-30

    IPC分类号: H04L12/56

    摘要: A packet processor includes a forwarding table configured to store address prefixes and a search engine configured to receive a packet and to search the forwarding table. The search engine includes a set bit counter configured to receive an address of the packet, to count set bits of a first bit vector associated with the packet, and to output a number of the set bits. A next hop table is configured to store a next hop pointer. A next bucket pointer receives the number of set bits and outputs one of the next hop pointers and the next bucket pointer based on the number of set bits.

    摘要翻译: 分组处理器包括被配置为存储地址前缀的转发表和被配置为接收分组并搜索转发表的搜索引擎。 搜索引擎包括被配置为接收分组的地址的设置位计数器,以对与分组相关联的第一比特向量的设置比特进行计数,并输出多个设置比特。 下一跳表被配置为存储下一跳指针。 下一个桶指针接收设置的位数,并根据设置的位数输出下一跳指针和下一个桶指针之一。

    ITERATIVE PARSING AND CLASSIFICATION
    19.
    发明申请
    ITERATIVE PARSING AND CLASSIFICATION 失效
    迭代分类和分类

    公开(公告)号:US20110116507A1

    公开(公告)日:2011-05-19

    申请号:US12947678

    申请日:2010-11-16

    IPC分类号: H04L12/56

    摘要: Some of the embodiments of the present disclosure provide a method comprising performing, by an iterative parser and classifier engine, a first parsing and classification cycle on a data packet, based at least in part on header information of the data packet; generating a first parsing and classification result based at least in part on performing the first parsing and classification cycle; and performing a second parsing and classification cycle on the data packet, based at least in part on header information of the data packet and the first parsing and classification result. Other embodiments are also described and claimed.

    摘要翻译: 本公开的一些实施例提供了一种方法,其包括至少部分地基于数据分组的报头信息,由迭代解析器和分类器引擎执行数据分组上的第一解析和分类周期; 至少部分地基于执行第一解析和分类周期来生成第一解析和分类结果; 以及至少部分地基于所述数据分组的报头信息和所述第一解析和分类结果对所述数据分组执行第二分析和分类周期。 还描述和要求保护其他实施例。

    Efficient host-controller address learning in ethernet switches
    20.
    发明授权
    Efficient host-controller address learning in ethernet switches 有权
    以太网交换机中高效的主机控制器地址学习

    公开(公告)号:US07826452B1

    公开(公告)日:2010-11-02

    申请号:US10761879

    申请日:2004-01-21

    IPC分类号: H04L12/28

    CPC分类号: H04L45/74 H04L49/35

    摘要: A method, apparatus, and computer-readable media for a switch comprising a plurality of network ports and a central processing unit (CPU) interface comprises receiving, on one of the network ports, a packet comprising a source media access control (MAC) address; sending, to the CPU interface, a request to approve an association between the one of the network ports and the source MAC address when no request to approve the association between the one of the network ports and the source MAC address has been sent to the CPU interface; and sending, to the CPU interface, the request to approve the association between the one of the network ports and the source MAC address when an association between the source MAC address and a different one of the network ports has been approved.

    摘要翻译: 一种用于交换机的方法,装置和计算机可读介质,包括多个网络端口和中央处理单元(CPU)接口,包括在所述网络端口之一上接收包括源媒体访问控制(MAC)地址 ; 当没有请求批准一个网络端口和源MAC地址之间的关联的请求已经被发送到CPU时,向CPU接口发送批准一个网络端口与源MAC地址之间的关联的请求 接口; 并且当源MAC地址与不同网络端口之间的关联已被批准时,向CPU接口发送批准一个网络端口与源MAC地址之间的关联的请求。