LDPC architecture
    12.
    发明申请
    LDPC architecture 有权
    LDPC架构

    公开(公告)号:US20050258984A1

    公开(公告)日:2005-11-24

    申请号:US11123671

    申请日:2005-05-06

    IPC分类号: H03M7/00 H03M13/11 H03M13/45

    摘要: The current invention involves a forward error detection system, especially for use with Low Density Parity Check codes. A parallel SISO structure allows the decoder to process multiple parity equations at the same time. There is a new SISO decoder which allows for the updating of the Log-likelihood-ratio's in a single operation, as opposed to the two pass traditionally associated with the Tanner Graph's. In the decoder, there is a mapping structure that correctly aligns the stored estimates, the stored differences and the SISO's. There is also the ability to deal with multiple instances of the same data being processed at the same time. This structure manages the updates and the differences in such a manner that all calculations on a single piece of data that are processed in parallel are incorporated correctly in the new updated estimates.

    摘要翻译: 本发明涉及一种前向误差检测系统,特别适用于低密度奇偶校验码。 并行SISO结构允许解码器同时处理多个奇偶校验方程。 有一个新的SISO解码器,允许在单个操作中更新对数似然比,而不是传统上与Tanner Graph相关联的两遍。 在解码器中,存在一个映射结构,可以正确对齐所存储的估计值,存储的差值和SISO。 还可以处理同时处理的同一数据的多个实例。 这种结构以这样的方式管理更新和差异,即将并行处理的单个数据上的所有计算都正确地并入到新的更新估计中。

    SISO decoder
    13.
    发明申请
    SISO decoder 有权
    SISO解码器

    公开(公告)号:US20050258985A1

    公开(公告)日:2005-11-24

    申请号:US11123672

    申请日:2005-05-06

    IPC分类号: H03M7/00 H03M13/11 H03M13/45

    摘要: The current invention involves a forward error detection system, especially for use with Low Density Parity Check codes. A parallel SISO structure allows the decoder to process multiple parity equations at the same time. There is a new SISO decoder which allows for the updating of the Log-likelihood-ratio's in a single operation, as opposed to the two pass traditionally associated with the Tanner Graph's. In the decoder, there is a mapping structure that correctly aligns the stored estimates, the stored differences and the SISO's. There is also the ability to deal with multiple instances of the same data being processed at the same time. This structure manages the updates and the differences in such a manner that all calculations on a single piece of data that are processed in parallel are incorporated correctly in the new updated estimates.

    摘要翻译: 本发明涉及一种前向误差检测系统,特别适用于低密度奇偶校验码。 并行SISO结构允许解码器同时处理多个奇偶校验方程。 有一个新的SISO解码器,允许在单个操作中更新对数似然比,而不是传统上与Tanner Graph相关联的两遍。 在解码器中,存在一个映射结构,可以正确对齐所存储的估计值,存储的差值和SISO。 还可以处理同时处理的同一数据的多个实例。 这种结构以这样的方式管理更新和差异,即将并行处理的单个数据上的所有计算都并入正确的新更新估计中。

    TECHNIQUES FOR CONTROLLING OPERATION OF CONTROL LOOPS IN A RECEIVER
    14.
    发明申请
    TECHNIQUES FOR CONTROLLING OPERATION OF CONTROL LOOPS IN A RECEIVER 有权
    用于控制接收器中控制杆操作的技术

    公开(公告)号:US20080039042A1

    公开(公告)日:2008-02-14

    申请号:US11560802

    申请日:2006-11-16

    IPC分类号: H04B7/00

    CPC分类号: H04B1/109

    摘要: Techniques for controlling operation of control loops in a receiver are described. The operation of at least one control loop is modified in conjunction with a change in operating state, which may correspond to a change in linearity state, gain state, operating frequency, antenna configuration, etc. A change in linearity state may occur when jammers are detected and may cause bias current of analog circuit blocks to be adjusted. The at least one control loop to be modified may include a DC loop, an AGC loop, etc. The operation of a control loop may be modified by disabling the control loop or changing its time constant prior to changing operating state, waiting a predetermined amount of time to allow the receiver to settle, and enabling the control loop or restoring its time constant after waiting the predetermined amount of time.

    摘要翻译: 描述了用于控制接收机中的控制环路的操作的技术。 结合操作状态的改变来修改至少一个控制回路的操作,其可以对应于线性状态,增益状态,操作频率,天线配置等的改变。线性状态的变化可能发生在干扰器 并且可能导致模拟电路块的偏置电流被调整。 要修改的至少一个控制环路可以包括DC环路,AGC环路等。可以通过在改变操作状态之前禁用控制环路或改变其时间常数来修改控制环路的操作,等待预定量 的时间以允许接收机安定,并且在等待预定时间量之后启用控制环路或恢复其时间常数。

    Systems, methods, and apparatus for establishing finger lock state
    15.
    发明申请
    Systems, methods, and apparatus for establishing finger lock state 有权
    用于建立手指锁状态的系统,方法和装置

    公开(公告)号:US20070071072A1

    公开(公告)日:2007-03-29

    申请号:US11361887

    申请日:2006-02-24

    IPC分类号: H04B1/707

    CPC分类号: H04B1/7117

    摘要: Embodiments include a method of signal processing in which each of a set of individual estimates of a transmitted symbol is added to a combined symbol estimate based on a relation between a signal quality value corresponding to the individual estimate and a threshold value, where the threshold value is based on a maximum among the signal quality values.

    摘要翻译: 实施例包括一种信号处理方法,其中基于与各个估计相对应的信号质量值与阈值之间的关系将发送符号的一组单独估计中的每一个相加到组合符号估计中,其中阈值 是基于信号质量值中的最大值。

    Noise reduction filtering in a wireless communication system
    16.
    发明申请
    Noise reduction filtering in a wireless communication system 有权
    无线通信系统中的降噪滤波

    公开(公告)号:US20060109939A1

    公开(公告)日:2006-05-25

    申请号:US10994012

    申请日:2004-11-19

    IPC分类号: H04B1/10

    摘要: A technique for noise reduction in a wireless communication system uses controllable bandwidth filters (120) to filter a received signal. In a typical implementation, the filters (120) are used at baseband frequencies. A measurement (RSSI) is indicative of the strength of the received signal. A control circuit (144) generates a control signal (146) to control the bandwidth of the filters (120). If the received signal strength is above a first threshold, a wider bandwidth may be used for the filters (120). If the received signal is below a second threshold, the control circuit (144) generates the control signal (146) to set the filters (120) to a more narrow bandwidth. The system (100) may also be used with digital filters (150, 152) following digitization by analog to digital converters (ADCs) (130, 132). The system (100) is particularly well-suited for operation with noise-shaped ADCs (130, 132), such as Delta-Sigma converters.

    摘要翻译: 用于无线通信系统中降噪的技术使用可控带宽滤波器(120)来对接收到的信号进行滤波。 在典型的实现中,滤波器(120)用于基带频率。 测量(RSSI)表示接收信号的强度。 控制电路(144)产生控制信号(146)以控制滤波器(120)的带宽。 如果接收信号强度高于第一阈值,则可以对滤波器(120)使用更宽的带宽。 如果接收信号低于第二阈值,则控制电路(144)产生控制信号(146)以将滤波器(120)设置为更窄的带宽。 在数模转换器(ADC)(130,132)之后,系统(100)也可以与数字滤波器(150,152)一起使用。 系统(100)特别适用于具有噪声形状的ADC(130,132)(诸如Δ-Σ转换器)的操作。

    Adaptive antenna method and apparatus
    17.
    发明授权
    Adaptive antenna method and apparatus 有权
    自适应天线方法和装置

    公开(公告)号:US06952455B1

    公开(公告)日:2005-10-04

    申请号:US09632081

    申请日:2000-08-02

    申请人: Brian Banister

    发明人: Brian Banister

    IPC分类号: H04B7/02 H04B7/06

    CPC分类号: H04B7/0626 H04B7/0658

    摘要: A transmitter generates a pair of test weight vectors, each vector comprised of a plurality of complex entries, with each entry corresponding a different one of a plurality of antennae. The first and second complex weight vectors are applied to a dedicated pilot signal during alternate time intervals. During each time interval, the average of the first and second complex weight vectors is applied to the data traffic transmitted by the transmitter. A receiver alternately receives the pilot signal as multiplied by the first and second weight vectors as described above. The receiver determines which of the weighted pilot signals resulted in a stronger signal received at the mobile and, based upon this determination, transmits feedback. The transmitter receives the feedback and updates the first and second weights accordingly

    摘要翻译: 发射机产生一对测试权重向量,每个矢量由多个复杂条目组成,每个条目对应于多个天线中的不同的天线。 第一和第二复权重向量在交替时间间隔期间被应用于专用导频信号。 在每个时间间隔期间,将第一和第二复权重向量的平均值应用于由发射机发送的数据业务。 如上所述,接收机交替地接收乘以第一和第二权重向量的导频信号。 接收机确定哪个加权导频信号导致在移动台处接收到更强的信号,并且基于该确定发送反馈。 发射机接收反馈并相应地更新第一和第二权重

    Fast feedback channel with flexible bit reliability for wireless communications
    18.
    发明授权
    Fast feedback channel with flexible bit reliability for wireless communications 有权
    快速反馈通道,灵活的无线通信位可靠性

    公开(公告)号:US06876641B2

    公开(公告)日:2005-04-05

    申请号:US09834417

    申请日:2001-04-12

    申请人: Brian Banister

    发明人: Brian Banister

    IPC分类号: H04L1/00 H04L1/12 H04J13/00

    摘要: A single physical channel carries “fast feedback” information in such a way that each type of data is on a physical sub-channel. The sub-channels are not “logical” channels in that they cannot be separated by logical functions alone because some knowledge of the modulation mechanisms is required. Each sub-channel is independently channel coded (this is outer channel coding if an inner code is applied). The resulting code symbols from all sub-channels are then merged into one set of symbols. These code symbols can then optionally be concatenation interleaved and inner channel coded, if the performance enhancement is desired and the complexity is acceptable. The result is then extended by code symbol repetition to provide a total number of symbols greater than or equal to one of the possible quantities of symbols per frame supported by the physical channel, and then decimated (symbols deleted) to provide a number of symbols equal to one of the allowable quantities of symbols per frame. The result is then interleaved, and transmitted over the physical channel.

    摘要翻译: 单个物理信道以每种类型的数据在物理子信道上的方式携带“快速反馈”信息。 子通道不是“逻辑”通道,因为它们不能由逻辑功能单独分离,因为需要调制机制的一些知识。 每个子信道是独立的信道编码(如果应用了内部代码,则这是外部信道编码)。 然后将所有子通道的结果代码符号合并成一组符号。 然后,如果期望性能增强并且复杂度是可接受的,则这些代码符号然后可选地被交错和内部信道编码。 然后,结果通过代码符号重复进行扩展,以提供大于或等于物理信道支持的每帧可能的符号量之一的符号的总数,然后抽取(符号被删除)以提供多个符号相等 到每帧允许的符号数量之一。 然后将结果交错,并通过物理信道传输。

    Method and apparatus for quick acquisition of pilot signals using bank
switching method

    公开(公告)号:US6091762A

    公开(公告)日:2000-07-18

    申请号:US955499

    申请日:1997-10-22

    摘要: When a mobile communication unit (e.g. a cellular telephone) is powered up, the unit must lock on to a local base station, or "acquire" a base station signal, to enable the user to send and receive calls. To lock on a local base station, the mobile unit must determine the delay at which the base station is sending the pseudo random (PN) code. This process is called the "acquisition." The current art of acquiring a base station involves collecting a set of samples at a particular code phase, or delay, testing the collected sample, and repeating these steps using another code phase until the correct code phase is found. The present invention discloses a method and apparatus for collecting a set of samples at a particular code phase, and simultaneously testing the collected sample and collecting the next set of samples for another code phase. Using multiple banks, the system resources such as the dwell accumulators and the DSP are used concurrently to reduce the time required to test the phase delays of the short code to lock on to a base station.